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Commit b1332729 authored by Jagadeesh Kona's avatar Jagadeesh Kona
Browse files

clk: qcom: shima: Fix stuck at off warnings during probe 



Add CLK_DONT_HOLD_STATE flag to avoid the framework from
placing a proxy vote to enable the clocks during probe since
these GPU clocks are failing to turn on as their corresponding
GDSC is not enabled yet.

Change-Id: I4771d1c5696a069d0d67d407de3a7a5b1f5b139e
Signed-off-by: default avatarJagadeesh Kona <jkona@codeaurora.org>
parent f0e66e89

drivers/clk/qcom/gcc-shima.c

+2 −0
Original line number Diff line number Diff line
@@ -1861,6 +1861,7 @@ static struct clk_branch gcc_gpu_memnoc_gfx_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gcc_gpu_memnoc_gfx_clk",

			.flags = CLK_DONT_HOLD_STATE,

			.ops = &clk_branch2_aon_ops,

		},

	},
@@ -1874,6 +1875,7 @@ static struct clk_branch gcc_gpu_snoc_dvm_gfx_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gcc_gpu_snoc_dvm_gfx_clk",

			.flags = CLK_DONT_HOLD_STATE,

			.ops = &clk_branch2_aon_ops,

		},

	},

drivers/clk/qcom/gpucc-shima.c

+3 −2
Original line number Diff line number Diff line
@@ -306,7 +306,7 @@ static struct clk_branch gpu_cc_cx_gmu_clk = { 
				.hw = &gpu_cc_gmu_clk_src.clkr.hw,

			},

			.num_parents = 1,

			.flags = CLK_SET_RATE_PARENT,

			.flags = CLK_SET_RATE_PARENT | CLK_DONT_HOLD_STATE,

			.ops = &clk_branch2_aon_ops,

		},

	},
@@ -346,6 +346,7 @@ static struct clk_branch gpu_cc_cxo_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gpu_cc_cxo_clk",

			.flags = CLK_DONT_HOLD_STATE,

			.ops = &clk_branch2_aon_ops,

		},

	},
@@ -412,7 +413,7 @@ static struct clk_branch gpu_cc_hub_cx_int_clk = { 
				.hw = &gpu_cc_hub_cx_int_div_clk_src.clkr.hw,

			},

			.num_parents = 1,

			.flags = CLK_SET_RATE_PARENT,

			.flags = CLK_SET_RATE_PARENT | CLK_DONT_HOLD_STATE,

			.ops = &clk_branch2_aon_ops,

		},

	},