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Commit ad4cd013 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Greg Kroah-Hartman
Browse files

mt76: mt76x02: fix endianness warnings in mt76x02_mac.c 



[ Upstream commit c33edef520213feccebc22c9474c685b9fb60611 ]

Fix the following sparse warning in mt76x02_mac_write_txwi and
mt76x02_mac_tx_rate_val routines:
drivers/net/wireless/mediatek/mt76/mt76x02_mac.c:237:19:
	warning: restricted __le16 degrades to intege
	warning: cast from restricted __le16
drivers/net/wireless/mediatek/mt76/mt76x02_mac.c:383:28:
	warning: incorrect type in assignment (different base types)
	expected restricted __le16 [usertype] rate
	got unsigned long

Fixes: db9f11d3 ("mt76: store wcid tx rate info in one u32 reduce locking")
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent bdbc9311

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

+7 −6
Original line number Original line Diff line number Diff line
@@ -154,7 +154,7 @@ void mt76x02_mac_wcid_set_drop(struct mt76x02_dev *dev, u8 idx, bool drop) 
		mt76_wr(dev, MT_WCID_DROP(idx), (val & ~bit) | (bit * drop));

		mt76_wr(dev, MT_WCID_DROP(idx), (val & ~bit) | (bit * drop));

}

}





static __le16

static u16

mt76x02_mac_tx_rate_val(struct mt76x02_dev *dev,

mt76x02_mac_tx_rate_val(struct mt76x02_dev *dev,

			const struct ieee80211_tx_rate *rate, u8 *nss_val)

			const struct ieee80211_tx_rate *rate, u8 *nss_val)

{

{
@@ -200,14 +200,14 @@ mt76x02_mac_tx_rate_val(struct mt76x02_dev *dev, 
		rateval |= MT_RXWI_RATE_SGI;

		rateval |= MT_RXWI_RATE_SGI;





	*nss_val = nss;

	*nss_val = nss;

	return cpu_to_le16(rateval);

	return rateval;

}

}





void mt76x02_mac_wcid_set_rate(struct mt76x02_dev *dev, struct mt76_wcid *wcid,

void mt76x02_mac_wcid_set_rate(struct mt76x02_dev *dev, struct mt76_wcid *wcid,

			       const struct ieee80211_tx_rate *rate)

			       const struct ieee80211_tx_rate *rate)

{

{

	s8 max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);

	s8 max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);

	__le16 rateval;

	u16 rateval;

	u32 tx_info;

	u32 tx_info;

	s8 nss;

	s8 nss;
@@ -320,7 +320,7 @@ void mt76x02_mac_write_txwi(struct mt76x02_dev *dev, struct mt76x02_txwi *txwi, 
	struct ieee80211_key_conf *key = info->control.hw_key;

	struct ieee80211_key_conf *key = info->control.hw_key;

	u32 wcid_tx_info;

	u32 wcid_tx_info;

	u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2));

	u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2));

	u16 txwi_flags = 0;

	u16 txwi_flags = 0, rateval;

	u8 nss;

	u8 nss;

	s8 txpwr_adj, max_txpwr_adj;

	s8 txpwr_adj, max_txpwr_adj;

	u8 ccmp_pn[8], nstreams = dev->mt76.chainmask & 0xf;

	u8 ccmp_pn[8], nstreams = dev->mt76.chainmask & 0xf;
@@ -356,14 +356,15 @@ void mt76x02_mac_write_txwi(struct mt76x02_dev *dev, struct mt76x02_txwi *txwi, 




	if (wcid && (rate->idx < 0 || !rate->count)) {

	if (wcid && (rate->idx < 0 || !rate->count)) {

		wcid_tx_info = wcid->tx_info;

		wcid_tx_info = wcid->tx_info;

		txwi->rate = FIELD_GET(MT_WCID_TX_INFO_RATE, wcid_tx_info);

		rateval = FIELD_GET(MT_WCID_TX_INFO_RATE, wcid_tx_info);

		max_txpwr_adj = FIELD_GET(MT_WCID_TX_INFO_TXPWR_ADJ,

		max_txpwr_adj = FIELD_GET(MT_WCID_TX_INFO_TXPWR_ADJ,

					  wcid_tx_info);

					  wcid_tx_info);

		nss = FIELD_GET(MT_WCID_TX_INFO_NSS, wcid_tx_info);

		nss = FIELD_GET(MT_WCID_TX_INFO_NSS, wcid_tx_info);

	} else {

	} else {

		txwi->rate = mt76x02_mac_tx_rate_val(dev, rate, &nss);

		rateval = mt76x02_mac_tx_rate_val(dev, rate, &nss);

		max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);

		max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);

	}

	}

	txwi->rate = cpu_to_le16(rateval);





	txpwr_adj = mt76x02_tx_get_txpwr_adj(dev, dev->mt76.txpower_conf,

	txpwr_adj = mt76x02_tx_get_txpwr_adj(dev, dev->mt76.txpower_conf,

					     max_txpwr_adj);

					     max_txpwr_adj);