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Commit ad164e57 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add NPU-DDR devfreq nodes to SA8195"

parents e4840c1a 65ba7f89

qcom/sdmshrike.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -828,6 +828,25 @@ 
		};

	};



	npu_npu_ddr_bw: qcom,npu-npu-ddr-bw {

		compatible = "qcom,devfreq-icc-ddr";

		governor = "performance";

		interconnects = <&compute_noc MASTER_NPU &mc_virt SLAVE_EBI1>;

		operating-points-v2 = <&ddr_bw_opp_table>;

		qcom,active-only;

	};



	npu_npu_ddr_bwmon: qcom,npu-npu-ddr-bwmon@9960300 {

		compatible = "qcom,bimc-bwmon4";

		reg = <0x9960300 0x300>, <0x9960200 0x200>;

		reg-names = "base", "global_base";

		interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;

		qcom,mport = <0>;

		qcom,hw-timer-hz = <19200000>;

		qcom,target-dev = <&npu_npu_ddr_bw>;

		qcom,count-unit = <0x10000>;

	};



	cpu_pmu: cpu-pmu {

		compatible = "arm,armv8-pmuv3";

		qcom,irq-is-percpu;

qcom/sm8150.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -882,6 +882,25 @@ 
		};

	};



	npu_npu_ddr_bw: qcom,npu-npu-ddr-bw {

		compatible = "qcom,devfreq-icc-ddr";

		governor = "performance";

		interconnects = <&compute_noc MASTER_NPU &mc_virt SLAVE_EBI1>;

		operating-points-v2 = <&ddr_bw_opp_table>;

		qcom,active-only;

	};



	npu_npu_ddr_bwmon: qcom,npu-npu-ddr-bwmon@9960300 {

		compatible = "qcom,bimc-bwmon4";

		reg = <0x9960300 0x300>, <0x9960200 0x200>;

		reg-names = "base", "global_base";

		interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;

		qcom,mport = <0>;

		qcom,hw-timer-hz = <19200000>;

		qcom,target-dev = <&npu_npu_ddr_bw>;

		qcom,count-unit = <0x10000>;

	};



	cpu_pmu: cpu-pmu {

		compatible = "arm,armv8-pmuv3";

		qcom,irq-is-percpu;