Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 65ba7f89 authored by Shreyas K K's avatar Shreyas K K
Browse files

ARM: dts: msm: Add NPU-DDR devfreq nodes to SA8195

Add NPU-DDR device tree nodes for devfreq support on
target SA8195.

Change-Id: Ibecfdc9a9b952a0fb520274fc6f3f7ff6ae1a68e
parent 52b8ab20
Loading
Loading
Loading
Loading
+19 −0
Original line number Diff line number Diff line
@@ -808,6 +808,25 @@
		};
	};

	npu_npu_ddr_bw: qcom,npu-npu-ddr-bw {
		compatible = "qcom,devfreq-icc-ddr";
		governor = "performance";
		interconnects = <&compute_noc MASTER_NPU &mc_virt SLAVE_EBI1>;
		operating-points-v2 = <&ddr_bw_opp_table>;
		qcom,active-only;
	};

	npu_npu_ddr_bwmon: qcom,npu-npu-ddr-bwmon@9960300 {
		compatible = "qcom,bimc-bwmon4";
		reg = <0x9960300 0x300>, <0x9960200 0x200>;
		reg-names = "base", "global_base";
		interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
		qcom,mport = <0>;
		qcom,hw-timer-hz = <19200000>;
		qcom,target-dev = <&npu_npu_ddr_bw>;
		qcom,count-unit = <0x10000>;
	};

	cpu_pmu: cpu-pmu {
		compatible = "arm,armv8-pmuv3";
		qcom,irq-is-percpu;