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Commit ac42fd63 authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher
Browse files

drm/amd/display: reset hdmi tmds rate and data scramble on pipe reset 



[why]
hdmi data scramble and tmds rate is not reset during pipe reset.

[how]
reset hdmi tmds rate and data scramble on pipe reset

Signed-off-by: default avatarWenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: default avatarChris Park <Chris.Park@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 38df0701

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

+19 −0
Original line number Diff line number Diff line
@@ -1038,6 +1038,24 @@ static void dce110_stream_encoder_set_avmute( 
}





static void dce110_reset_hdmi_stream_attribute(

	struct stream_encoder *enc)

{

	struct dce110_stream_encoder *enc110 = DCE110STRENC_FROM_STRENC(enc);

	if (enc110->se_mask->HDMI_DATA_SCRAMBLE_EN)

		REG_UPDATE_5(HDMI_CONTROL,

			HDMI_PACKET_GEN_VERSION, 1,

			HDMI_KEEPOUT_MODE, 1,

			HDMI_DEEP_COLOR_ENABLE, 0,

			HDMI_DATA_SCRAMBLE_EN, 0,

			HDMI_CLOCK_CHANNEL_RATE, 0);

	else

		REG_UPDATE_3(HDMI_CONTROL,

			HDMI_PACKET_GEN_VERSION, 1,

			HDMI_KEEPOUT_MODE, 1,

			HDMI_DEEP_COLOR_ENABLE, 0);

}



#define DP_SEC_AUD_N__DP_SEC_AUD_N__DEFAULT 0x8000

#define DP_SEC_TIMESTAMP__DP_SEC_TIMESTAMP_MODE__AUTO_CALC 1
@@ -1618,6 +1636,7 @@ static const struct stream_encoder_funcs dce110_str_enc_funcs = { 
	.setup_stereo_sync  = setup_stereo_sync,

	.set_avmute = dce110_stream_encoder_set_avmute,

	.dig_connect_to_otg  = dig_connect_to_otg,

	.hdmi_reset_stream_attribute = dce110_reset_hdmi_stream_attribute,

};



void dce110_stream_encoder_construct(

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+4 −1
Original line number Diff line number Diff line
@@ -1040,9 +1040,12 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx, int option) 
	struct dc_link *link = stream->link;

	struct dc *dc = pipe_ctx->stream->ctx->dc;



	if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))

	if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) {

		pipe_ctx->stream_res.stream_enc->funcs->stop_hdmi_info_packets(

			pipe_ctx->stream_res.stream_enc);

		pipe_ctx->stream_res.stream_enc->funcs->hdmi_reset_stream_attribute(

			pipe_ctx->stream_res.stream_enc);

	}



	if (dc_is_dp_signal(pipe_ctx->stream->signal))

		pipe_ctx->stream_res.stream_enc->funcs->stop_dp_info_packets(

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

+14 −0
Original line number Diff line number Diff line
@@ -1004,6 +1004,19 @@ void enc1_stream_encoder_set_avmute( 
	REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value);

}



void enc1_reset_hdmi_stream_attribute(

	struct stream_encoder *enc)

{

	struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);



	REG_UPDATE_5(HDMI_CONTROL,

		HDMI_PACKET_GEN_VERSION, 1,

		HDMI_KEEPOUT_MODE, 1,

		HDMI_DEEP_COLOR_ENABLE, 0,

		HDMI_DATA_SCRAMBLE_EN, 0,

		HDMI_CLOCK_CHANNEL_RATE, 0);

}





#define DP_SEC_AUD_N__DP_SEC_AUD_N__DEFAULT 0x8000

#define DP_SEC_TIMESTAMP__DP_SEC_TIMESTAMP_MODE__AUTO_CALC 1
@@ -1563,6 +1576,7 @@ static const struct stream_encoder_funcs dcn10_str_enc_funcs = { 
	.setup_stereo_sync  = enc1_setup_stereo_sync,

	.set_avmute = enc1_stream_encoder_set_avmute,

	.dig_connect_to_otg  = enc1_dig_connect_to_otg,

	.hdmi_reset_stream_attribute = enc1_reset_hdmi_stream_attribute,

};



void dcn10_stream_encoder_construct(

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h

+3 −0
Original line number Diff line number Diff line
@@ -615,4 +615,7 @@ void get_audio_clock_info( 
	uint32_t actual_pixel_clock_100Hz,

	struct audio_clock_info *audio_clock_info);



void enc1_reset_hdmi_stream_attribute(

	struct stream_encoder *enc);



#endif /* __DC_STREAM_ENCODER_DCN10_H__ */

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c

+1 −0
Original line number Diff line number Diff line
@@ -588,6 +588,7 @@ static const struct stream_encoder_funcs dcn20_str_enc_funcs = { 
	.dp_set_dsc_config = enc2_dp_set_dsc_config,

#endif

	.set_dynamic_metadata = enc2_set_dynamic_metadata,

	.hdmi_reset_stream_attribute = enc1_reset_hdmi_stream_attribute,

};



void dcn20_stream_encoder_construct(