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Commit a9af497c authored by Lina Iyer's avatar Lina Iyer Committed by Maulik Shah
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ARM: dts: msm: add initial device tree for Lahaina low power modes 

Add initial device tree bindings to support CPU and cluster low power
modes on Lahaina. To do low power modes, switch over the enable-method
of the CPU to PSCI. Also add bindings for RPMH, master and DDR stats.

Since PSCI firmware will read the PSCI state id from cpu nodes, add
cpu-idle-states to the cpu DT bindings.

Change-Id: I7d9ef6f89e1a9b0987df3b7511f5b0b5ed627abc
parent 850fa4c3

qcom/lahaina-pm.dtsi

0 → 100644
+129 −0
Original line number Diff line number Diff line 
&soc {

	qcom,lpm-levels {

		compatible = "qcom,lpm-levels";

		#address-cells = <1>;

		#size-cells = <0>;



		qcom,pm-cluster@0 {

			reg = <0>;

			#address-cells = <1>;

			#size-cells = <0>;

			idle-state-name = "L3";

			qcom,clstr-tmr-add = <1000>;

			qcom,psci-mode-shift = <4>;

			qcom,psci-mode-mask = <0xfff>;



			CLUSTER_WFI: qcom,pm-cluster-level@0 { /* D1 */

				reg = <0>;

				compatible = "arm,idle-state";

				idle-state-name = "l3-wfi";

				entry-latency-us = <48>;

				exit-latency-us = <51>;

				min-residency-us = <99>;

				arm,psci-suspend-param = <0x10>;

				qcom,psci-mode = <0x1>;

			};



			CLUSTER_OFF: qcom,pm-cluster-level@1 { /* AOSS sleep */

				reg = <1>;

				compatible = "arm,idle-state";

				idle-state-name = "llcc-off";

				entry-latency-us = <3263>;

				exit-latency-us = <6562>;

				min-residency-us = <9987>;

				arm,psci-suspend-param = <0xc240>;

				qcom,psci-mode = <0xc24>;

				qcom,is-reset;

				qcom,notify-rpm;

				qcom,min-child-idx = <1>;

			};



			qcom,pm-cpu@0 {

				reg = <0>;

				#address-cells = <1>;

				#size-cells = <0>;

				qcom,psci-mode-shift = <0>;

				qcom,psci-mode-mask = <0xf>;

				qcom,ref-stddev = <500>;

				qcom,tmr-add = <1000>;

				qcom,ref-premature-cnt = <1>;

				qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3>;



				SLVR_WFI: qcom,pm-cpu-level@0 { /* C1 */

					reg = <0>;

					compatible = "arm,idle-state";

					idle-state-name = "wfi";

					entry-latency-us = <57>;

					exit-latency-us = <43>;

					min-residency-us = <100>;

					arm,psci-suspend-param = <0x1>;

					qcom,psci-cpu-mode = <0x1>;

				};



				SLVR_RAIL_OFF: qcom,pm-cpu-level@1 {  /* C4 */

					reg = <1>;

					compatible = "arm,idle-state";

					idle-state-name = "rail-pc";

					entry-latency-us = <360>;

					exit-latency-us = <531>;

					min-residency-us = <3934>;

					arm,psci-suspend-param = <0x40000004>;

					local-timer-stop;

					qcom,psci-cpu-mode = <0x4>;

					qcom,is-reset;

					qcom,use-broadcast-timer;

				};

			};



			qcom,pm-cpu@1 {

				reg = <1>;

				#address-cells = <1>;

				#size-cells = <0>;

				qcom,psci-mode-shift = <0>;

				qcom,psci-mode-mask = <0xf>;

				qcom,cpu = <&CPU4 &CPU5 &CPU6 &CPU7>;



				GOLD_WFI: qcom,pm-cpu-level@2 { /* C1 */

					reg = <2>;

					compatible = "arm,idle-state";

					idle-state-name = "wfi";

					entry-latency-us = <57>;

					exit-latency-us = <43>;

					min-residency-us = <83>;

					arm,psci-suspend-param = <0x1>;

					qcom,psci-cpu-mode = <0x1>;

				};



				GOLD_RAIL_OFF: qcom,pm-cpu-level@3 {  /* C4 */

					reg = <3>;

					compatible = "arm,idle-state";

					idle-state-name = "rail-pc";

					entry-latency-us = <702>;

					exit-latency-us = <1061>;

					min-residency-us = <4488>;

					arm,psci-suspend-param = <0x40000004>;

					local-timer-stop;

					qcom,psci-cpu-mode = <0x4>;

					qcom,is-reset;

					qcom,use-broadcast-timer;

				};

			};

		};

	};



	rpmh-master-stats@b221200 {

		compatible = "qcom,rpmh-master-stats-v1";

		reg = <0xb221200 0x60>;

	};



	soc-sleep-stats@c3f0000 {

		compatible = "qcom,rpmh-sleep-stats";

		reg = <0xc3f0000 0x400>;

	};



	ddr-stats@c300000 {

		compatible = "qcom,ddr-stats";

		reg = <0xc300000 0x1000>, <0xc3f001c 0x4>;

		reg-names = "phys_addr_base", "offset_addr";

	};

};

qcom/lahaina.dtsi

+26 −8
Original line number Diff line number Diff line
@@ -32,11 +32,12 @@ 
			device_type = "cpu";

			compatible = "qcom,kryo";

			reg = <0x0 0x0>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x8000>;

			cpu-release-addr = <0x0 0x90000000>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			next-level-cache = <&L2_0>;

			L2_0: l2-cache {

			      compatible = "arm,arch-cache";
@@ -56,11 +57,12 @@ 
			device_type = "cpu";

			compatible = "qcom,kryo";

			reg = <0x0 0x100>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x8000>;

			cpu-release-addr = <0x0 0x90000000>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			next-level-cache = <&L2_1>;

			L2_1: l2-cache {

			      compatible = "arm,arch-cache";
@@ -74,11 +76,12 @@ 
			device_type = "cpu";

			compatible = "qcom,kryo";

			reg = <0x0 0x200>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x8000>;

			cpu-release-addr = <0x0 0x90000000>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			next-level-cache = <&L2_2>;

			L2_2: l2-cache {

			      compatible = "arm,arch-cache";
@@ -92,11 +95,12 @@ 
			device_type = "cpu";

			compatible = "qcom,kryo";

			reg = <0x0 0x300>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x8000>;

			cpu-release-addr = <0x0 0x90000000>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			next-level-cache = <&L2_3>;

			L2_3: l2-cache {

			      compatible = "arm,arch-cache";
@@ -110,11 +114,12 @@ 
			device_type = "cpu";

			compatible = "qcom,kryo";

			reg = <0x0 0x400>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x20000>;

			cpu-release-addr = <0x0 0x90000000>;

			capacity-dmips-mhz = <1946>;

			dynamic-power-coefficient = <454>;

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			next-level-cache = <&L2_4>;

			L2_4: l2-cache {

			      compatible = "arm,arch-cache";
@@ -128,11 +133,12 @@ 
			device_type = "cpu";

			compatible = "qcom,kryo";

			reg = <0x0 0x500>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x20000>;

			cpu-release-addr = <0x0 0x90000000>;

			capacity-dmips-mhz = <1946>;

			dynamic-power-coefficient = <454>;

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			next-level-cache = <&L2_5>;

			L2_5: l2-cache {

			      compatible = "arm,arch-cache";
@@ -146,11 +152,12 @@ 
			device_type = "cpu";

			compatible = "qcom,kryo";

			reg = <0x0 0x600>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x20000>;

			cpu-release-addr = <0x0 0x90000000>;

			capacity-dmips-mhz = <1946>;

			dynamic-power-coefficient = <454>;

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			next-level-cache = <&L2_6>;

			L2_6: l2-cache {

			      compatible = "arm,arch-cache";
@@ -164,11 +171,12 @@ 
			device_type = "cpu";

			compatible = "qcom,kryo";

			reg = <0x0 0x700>;

			enable-method = "spin-table";

			enable-method = "psci";

			cache-size = <0x20000>;

			cpu-release-addr = <0x0 0x90000000>;

			capacity-dmips-mhz = <2048>;

			dynamic-power-coefficient = <704>;

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			next-level-cache = <&L2_7>;

			L2_7: l2-cache {

			      compatible = "arm,arch-cache";
@@ -353,6 +361,11 @@ 
	ranges = <0 0 0 0xffffffff>;

	compatible = "simple-bus";



	psci {

		compatible = "arm,psci-1.0";

		method = "smc";

	};



	intc: interrupt-controller@17a00000 {

		compatible = "arm,gic-v3";

		#interrupt-cells = <3>;
@@ -1066,6 +1079,10 @@ 
		apps_bcm_voter: bcm_voter {

			compatible = "qcom,bcm-voter";

		};



		system_pm {

			compatible = "qcom,system-pm";

		};

	};



	disp_rsc: rsc@af20000 {
@@ -1269,3 +1286,4 @@ 
#include "lahaina-ion.dtsi"

#include "msm-arm-smmu-lahaina.dtsi"

#include "lahaina-usb.dtsi"

#include "lahaina-pm.dtsi"