Loading bindings/clock/qcom,gcc.txt +1 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ Required properties : "qcom,gcc-sdm630" "qcom,gcc-sdm660" "qcom,gcc-sdm845" "qcom,lahaina-gcc" - reg : shall contain base register location and length - #clock-cells : shall contain 1 Loading qcom/lahaina.dtsi +4 −3 Original line number Diff line number Diff line Loading @@ -529,9 +529,10 @@ #clock-cells = <1>; }; clock_gcc: qcom,gcc { compatible = "qcom,dummycc"; clock-output-names = "gcc_clocks"; clock_gcc: qcom,gcc@100000 { compatible = "qcom,lahaina-gcc", "syscon"; reg = <0x100000 0x1f0000>; reg-names = "cc_base"; #clock-cells = <1>; #reset-cells = <1>; }; Loading Loading
bindings/clock/qcom,gcc.txt +1 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ Required properties : "qcom,gcc-sdm630" "qcom,gcc-sdm660" "qcom,gcc-sdm845" "qcom,lahaina-gcc" - reg : shall contain base register location and length - #clock-cells : shall contain 1 Loading
qcom/lahaina.dtsi +4 −3 Original line number Diff line number Diff line Loading @@ -529,9 +529,10 @@ #clock-cells = <1>; }; clock_gcc: qcom,gcc { compatible = "qcom,dummycc"; clock-output-names = "gcc_clocks"; clock_gcc: qcom,gcc@100000 { compatible = "qcom,lahaina-gcc", "syscon"; reg = <0x100000 0x1f0000>; reg-names = "cc_base"; #clock-cells = <1>; #reset-cells = <1>; }; Loading