dt-bindings: clock: add MDSS clock names for 10nm architecture

This change adds names for the clocks and dividers used
by DP and DSI PLL on 10nm architecture.

Change-Id: I949d21d506c70960c78a55896b5ead418930922c
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>