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Commit a6bb5bb0 authored by Mohammed Mirza Mandayappurath Manzoor's avatar Mohammed Mirza Mandayappurath Manzoor
Browse files

ARM: dts: msm: Update ddr bandwidth levels for A660 

Update available ddr frequencies for each power level to optimize
performance per watt.

Change-Id: I5bd4b49b49ddc369902c03c2dd141f8cf8f5fb70
parent 230630d6

qcom/lahaina-gpu.dtsi

+21 −20
Original line number Original line Diff line number Diff line
@@ -57,7 +57,8 @@ 
			<MHZ_TO_KBPS(1353, 4)>, /* index=7  */

			<MHZ_TO_KBPS(1353, 4)>, /* index=7  */

			<MHZ_TO_KBPS(1555, 4)>, /* index=8  */

			<MHZ_TO_KBPS(1555, 4)>, /* index=8  */

			<MHZ_TO_KBPS(1708, 4)>, /* index=9  */

			<MHZ_TO_KBPS(1708, 4)>, /* index=9  */

			<MHZ_TO_KBPS(2092, 4)>; /* index=10  */

			<MHZ_TO_KBPS(2092, 4)>, /* index=10  */

			<MHZ_TO_KBPS(2133, 4)>; /* index=11  */









		qcom,bus-table-ddr8 =

		qcom,bus-table-ddr8 =
@@ -127,9 +128,9 @@ 
				qcom,bus-min-ddr7 = <11>;

				qcom,bus-min-ddr7 = <11>;

				qcom,bus-max-ddr7 = <11>;

				qcom,bus-max-ddr7 = <11>;





				qcom,bus-freq-ddr8 = <10>;

				qcom,bus-freq-ddr8 = <11>;

				qcom,bus-min-ddr8 = <10>;

				qcom,bus-min-ddr8 = <11>;

				qcom,bus-max-ddr8 = <10>;

				qcom,bus-max-ddr8 = <11>;

			};

			};





			qcom,gpu-pwrlevel@1 {

			qcom,gpu-pwrlevel@1 {
@@ -138,12 +139,12 @@ 
				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;

				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;





				qcom,bus-freq-ddr7 = <8>;

				qcom,bus-freq-ddr7 = <8>;

				qcom,bus-min-ddr7 = <8>;

				qcom,bus-min-ddr7 = <7>;

				qcom,bus-max-ddr7 = <11>;

				qcom,bus-max-ddr7 = <11>;





				qcom,bus-freq-ddr8 = <7>;

				qcom,bus-freq-ddr8 = <7>;

				qcom,bus-min-ddr8 = <7>;

				qcom,bus-min-ddr8 = <7>;

				qcom,bus-max-ddr8 = <10>;

				qcom,bus-max-ddr8 = <11>;

			};

			};





			qcom,gpu-pwrlevel@2 {

			qcom,gpu-pwrlevel@2 {
@@ -152,12 +153,12 @@ 
				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;

				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;





				qcom,bus-freq-ddr7 = <8>;

				qcom,bus-freq-ddr7 = <8>;

				qcom,bus-min-ddr7 = <5>;

				qcom,bus-min-ddr7 = <7>;

				qcom,bus-max-ddr7 = <8>;

				qcom,bus-max-ddr7 = <10>;





				qcom,bus-freq-ddr8 = <7>;

				qcom,bus-freq-ddr8 = <7>;

				qcom,bus-min-ddr8 = <6>;

				qcom,bus-min-ddr8 = <7>;

				qcom,bus-max-ddr8 = <8>;

				qcom,bus-max-ddr8 = <9>;

			};

			};





			qcom,gpu-pwrlevel@3 {

			qcom,gpu-pwrlevel@3 {
@@ -165,13 +166,13 @@ 
				qcom,gpu-freq = <443000000>;

				qcom,gpu-freq = <443000000>;

				qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;

				qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;





				qcom,bus-freq-ddr7 = <6>;

				qcom,bus-freq-ddr7 = <8>;

				qcom,bus-min-ddr7 = <5>;

				qcom,bus-min-ddr7 = <6>;

				qcom,bus-max-ddr7 = <8>;

				qcom,bus-max-ddr7 = <10>;





				qcom,bus-freq-ddr8 = <7>;

				qcom,bus-freq-ddr8 = <7>;

				qcom,bus-min-ddr8 = <5>;

				qcom,bus-min-ddr8 = <6>;

				qcom,bus-max-ddr8 = <8>;

				qcom,bus-max-ddr8 = <9>;

			};

			};





			qcom,gpu-pwrlevel@4 {

			qcom,gpu-pwrlevel@4 {
@@ -179,12 +180,12 @@ 
				qcom,gpu-freq = <315000000>;

				qcom,gpu-freq = <315000000>;

				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;

				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;





				qcom,bus-freq-ddr7 = <2>;

				qcom,bus-freq-ddr7 = <3>;

				qcom,bus-min-ddr7 = <2>;

				qcom,bus-min-ddr7 = <3>;

				qcom,bus-max-ddr7 = <8>;

				qcom,bus-max-ddr7 = <9>;





				qcom,bus-freq-ddr8 = <2>;

				qcom,bus-freq-ddr8 = <3>;

				qcom,bus-min-ddr8 = <2>;

				qcom,bus-min-ddr8 = <3>;

				qcom,bus-max-ddr8 = <8>;

				qcom,bus-max-ddr8 = <8>;

			};

			};

		};

		};