Merge "ARM: dts: msm: Add i2c, spi, uart dtsi nodes for monaco" (9c43a786) · Commits · e / devices / android_kernel_fairphone_FP5

qcom/monaco-pinctrl.dtsi

+738 −0

Original line number	Diff line number	Diff line
		@@ -7,5 +7,743 @@
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;

		qupv3_se6_2uart_pins: qupv3_se6_2uart_pins {
		qupv3_se6_2uart_active: qupv3_se6_2uart_active {
		mux {
		pins = "gpio30", "gpio31";
		function = "qup06";
		};

		config {
		pins = "gpio30", "gpio31";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se6_2uart_sleep: qupv3_se6_2uart_sleep {
		mux {
		pins = "gpio30", "gpio31";
		function = "gpio";
		};

		config {
		pins = "gpio30", "gpio31";
		drive-strength = <2>;
		bias-pull-down;
		};
		};
		};

		qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
		qupv3_se0_i2c_active: qupv3_se0_i2c_active {
		mux {
		pins = "gpio4", "gpio5";
		function = "qup00";
		};

		config {
		pins = "gpio4", "gpio5";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
		mux {
		pins = "gpio4", "gpio5";
		function = "gpio";
		};

		config {
		pins = "gpio4", "gpio5";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se0_spi_pins: qupv3_se0_spi_pins {
		qupv3_se0_spi_active: qupv3_se0_spi_active {
		mux {
		pins = "gpio4", "gpio5",
		"gpio6", "gpio7";
		function = "qup00";
		};

		config {
		pins = "gpio4", "gpio5",
		"gpio6", "gpio7";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
		mux {
		pins = "gpio4", "gpio5",
		"gpio6", "gpio7";
		function = "gpio";
		};

		config {
		pins = "gpio4", "gpio5",
		"gpio6", "gpio7";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
		qupv3_se1_i2c_active: qupv3_se1_i2c_active {
		mux {
		pins = "gpio10", "gpio11";
		function = "qup01";
		};

		config {
		pins = "gpio10", "gpio11";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
		mux {
		pins = "gpio10", "gpio11";
		function = "gpio";
		};

		config {
		pins = "gpio10", "gpio11";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se1_spi_pins: qupv3_se1_spi_pins {
		qupv3_se1_spi_active: qupv3_se1_spi_active {
		mux {
		pins = "gpio10", "gpio11",
		"gpio12", "gpio13";
		function = "qup01";
		};

		config {
		pins = "gpio10", "gpio11",
		"gpio12", "gpio13";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
		mux {
		pins = "gpio10", "gpio11",
		"gpio12", "gpio13";
		function = "gpio";
		};

		config {
		pins = "gpio10", "gpio11",
		"gpio12", "gpio13";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
		qupv3_se2_i2c_active: qupv3_se2_i2c_active {
		mux {
		pins = "gpio0", "gpio1";
		function = "qup02";
		};

		config {
		pins = "gpio0", "gpio1";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
		mux {
		pins = "gpio0", "gpio1";
		function = "gpio";
		};

		config {
		pins = "gpio0", "gpio1";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se2_spi_pins: qupv3_se2_spi_pins {
		qupv3_se2_spi_active: qupv3_se2_spi_active {
		mux {
		pins = "gpio0", "gpio1",
		"gpio2", "gpio3";
		function = "qup02";
		};

		config {
		pins = "gpio0", "gpio1",
		"gpio2", "gpio3";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
		mux {
		pins = "gpio0", "gpio1",
		"gpio2", "gpio3";
		function = "gpio";
		};

		config {
		pins = "gpio0", "gpio1",
		"gpio2", "gpio3";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
		qupv3_se3_i2c_active: qupv3_se3_i2c_active {
		mux {
		pins = "gpio14", "gpio15";
		function = "qup03";
		};

		config {
		pins = "gpio14", "gpio15";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
		mux {
		pins = "gpio14", "gpio15";
		function = "gpio";
		};

		config {
		pins = "gpio14", "gpio15";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se3_spi_pins: qupv3_se3_spi_pins {
		qupv3_se3_spi_active: qupv3_se3_spi_active {
		mux {
		pins = "gpio14", "gpio15",
		"gpio16", "gpio17";
		function = "qup03";
		};

		config {
		pins = "gpio14", "gpio15",
		"gpio16", "gpio17";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
		mux {
		pins = "gpio14", "gpio15",
		"gpio16", "gpio17";
		function = "gpio";
		};

		config {
		pins = "gpio14", "gpio15",
		"gpio16", "gpio17";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
		qupv3_se4_i2c_active: qupv3_se4_i2c_active {
		mux {
		pins = "gpio20", "gpio21";
		function = "qup04";
		};

		config {
		pins = "gpio20", "gpio21";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
		mux {
		pins = "gpio20", "gpio21";
		function = "gpio";
		};

		config {
		pins = "gpio20", "gpio21";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se4_spi_pins: qupv3_se4_spi_pins {
		qupv3_se4_spi_active: qupv3_se4_spi_active {
		mux {
		pins = "gpio20", "gpio21",
		"gpio22", "gpio23";
		function = "qup04";
		};

		config {
		pins = "gpio20", "gpio21",
		"gpio22", "gpio23";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
		mux {
		pins = "gpio20", "gpio21",
		"gpio22", "gpio23";
		function = "gpio";
		};

		config {
		pins = "gpio20", "gpio21",
		"gpio22", "gpio23";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
		qupv3_se5_i2c_active: qupv3_se5_i2c_active {
		mux {
		pins = "gpio26", "gpio27";
		function = "qup05";
		};

		config {
		pins = "gpio26", "gpio27";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
		mux {
		pins = "gpio26", "gpio27";
		function = "gpio";
		};

		config {
		pins = "gpio26", "gpio27";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se5_spi_pins: qupv3_se5_spi_pins {
		qupv3_se5_spi_active: qupv3_se5_spi_active {
		mux {
		pins = "gpio26", "gpio27",
		"gpio28", "gpio29";
		function = "qup05";
		};

		config {
		pins = "gpio26", "gpio27",
		"gpio28", "gpio29";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
		mux {
		pins = "gpio26", "gpio27",
		"gpio28", "gpio29";
		function = "gpio";
		};

		config {
		pins = "gpio26", "gpio27",
		"gpio28", "gpio29";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
		qupv3_se6_i2c_active: qupv3_se6_i2c_active {
		mux {
		pins = "gpio24", "gpio25";
		function = "qup06";
		};

		config {
		pins = "gpio24", "gpio25";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
		mux {
		pins = "gpio24", "gpio25";
		function = "gpio";
		};

		config {
		pins = "gpio24", "gpio25";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se6_spi_pins: qupv3_se6_spi_pins {
		qupv3_se6_spi_active: qupv3_se6_spi_active {
		mux {
		pins = "gpio24", "gpio25",
		"gpio30", "gpio31";
		function = "qup06";
		};

		config {
		pins = "gpio24", "gpio25",
		"gpio30", "gpio31";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
		mux {
		pins = "gpio24", "gpio25",
		"gpio30", "gpio31";
		function = "gpio";
		};

		config {
		pins = "gpio24", "gpio25",
		"gpio30", "gpio31";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		qupv3_se7_i2c_pins_a: qupv3_se7_i2c_pins_a {
		qupv3_se7_i2c_active_L0_a: qupv3_se7_i2c_active_L0_a {
		mux {
		pins = "gpio101";
		function = "QUP0_L0";
		};

		config {
		pins = "gpio101";
		drive-strength = <2>;
		bias-pull-up;
		};

		};

		qupv3_se7_i2c_active_L1_a: qupv3_se7_i2c_active_L1_a {
		mux {
		pins = "gpio102";
		function = "QUP0_L1";
		};

		config {
		pins = "gpio102";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se7_i2c_sleep_a: qupv3_se7_i2c_sleep_a {
		mux {
		pins = "gpio101", "gpio102";
		function = "gpio";
		};

		config {
		pins = "gpio101", "gpio102";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se7_spi_pins_a: qupv3_se7_spi_pins_a {
		qupv3_se7_spi_active_L0_a: qupv3_se7_spi_active_L0_a {
		mux {
		pins = "gpio101";
		function = "QUP0_L0";
		};

		config {
		pins = "gpio101";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se7_spi_active_L1_a: qupv3_se7_spi_active_L1_a {
		mux {
		pins = "gpio102";
		function = "QUP0_L1";
		};

		config {
		pins = "gpio102";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se7_spi_active_L2_a: qupv3_se7_spi_active_L2_a {
		mux {
		pins = "gpio104";
		function = "QUP0_L2";
		};

		config {
		pins = "gpio104";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se7_spi_active_L3_a: qupv3_se7_spi_active_L3_a {
		mux {
		pins = "gpio105";
		function = "QUP0_L3";
		};

		config {
		pins = "gpio105";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se7_spi_sleep_a: qupv3_se7_spi_sleep_a {
		mux {
		pins = "gpio101", "gpio102",
		"gpio104", "gpio105";
		function = "gpio";
		};

		config {
		pins = "gpio101", "gpio102",
		"gpio104", "gpio105";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		qupv3_se7_i2c_pins_b: qupv3_se7_i2c_pins_b {
		qupv3_se7_i2c_active_L0_b: qupv3_se7_i2c_active_L0_b {
		mux {
		pins = "gpio104";
		function = "QUP0_L0";
		};

		config {
		pins = "gpio104";
		drive-strength = <2>;
		bias-pull-up;
		};

		};

		qupv3_se7_i2c_active_L1_b: qupv3_se7_i2c_active_L1_b {
		mux {
		pins = "gpio105";
		function = "QUP0_L1";
		};

		config {
		pins = "gpio105";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se7_i2c_sleep_b: qupv3_se7_i2c_sleep_b {
		mux {
		pins = "gpio104", "gpio105";
		function = "gpio";
		};

		config {
		pins = "gpio104", "gpio105";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se7_spi_pins_b: qupv3_se7_spi_pins_b {
		qupv3_se7_spi_active_L0_b: qupv3_se7_spi_active_L0_b {
		mux {
		pins = "gpio104";
		function = "QUP0_L0";
		};

		config {
		pins = "gpio104";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se7_spi_active_L1_b: qupv3_se7_spi_active_L1_b {
		mux {
		pins = "gpio105";
		function = "QUP0_L1";
		};

		config {
		pins = "gpio105";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se7_spi_active_L2_b: qupv3_se7_spi_active_L2_b {
		mux {
		pins = "gpio101";
		function = "QUP0_L2";
		};

		config {
		pins = "gpio101";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se7_spi_active_L3_b: qupv3_se7_spi_active_L3_b {
		mux {
		pins = "gpio102";
		function = "QUP0_L3";
		};

		config {
		pins = "gpio102";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se7_spi_sleep_b: qupv3_se7_spi_sleep_b {
		mux {
		pins = "gpio104", "gpio105",
		"gpio101", "gpio102";
		function = "gpio";
		};

		config {
		pins = "gpio104", "gpio105",
		"gpio101", "gpio102";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		qupv3_se5_4uart_pins: qupv3_se5_4uart_pins {
		qupv3_se5_default_ctsrtsrx:
		qupv3_se5_default_ctsrtsrx {
		mux {
		pins = "gpio26", "gpio27", "gpio79";
		function = "gpio";
		};

		config {
		pins = "gpio26", "gpio27", "gpio79";
		drive-strength = <2>;
		bias-pull-down;
		};
		};

		qupv3_se5_default_tx: qupv3_se5_default_tx {
		mux {
		pins = "gpio28";
		function = "gpio";
		};

		config {
		pins = "gpio28";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		qupv3_se5_ctsrx: qupv3_se5_ctsrx {
		mux {
		pins = "gpio26", "gpio79";
		function = "qup05";
		};

		config {
		pins = "gpio26", "gpio79";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se5_rts: qupv3_se5_rts {
		mux {
		pins = "gpio27";
		function = "qup05";
		};

		config {
		pins = "gpio27";
		drive-strength = <2>;
		bias-pull-down;
		};
		};

		qupv3_se5_tx: qupv3_se5_tx {
		mux {
		pins = "gpio28";
		function = "qup05";
		};

		config {
		pins = "gpio28";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};
		};
		};

qcom/monaco-qupv3.dtsi

0 → 100644

+481 −0

File added.

Preview size limit exceeded, changes collapsed.

qcom/monaco.dtsi

+10 −0

Original line number	Diff line number	Diff line
		@@ -17,6 +17,11 @@
		#size-cells = <2>;
		memory { device_type = "memory"; reg = <0 0 0 0>; };

		aliases {
		serial0 = &qupv3_se6_2uart;
		hsuart0 = &qupv3_se5_4uart;
		};

		cpus {
		#address-cells = <2>;
		#size-cells = <0>;
		@@ -820,6 +825,11 @@
		#include "msm-arm-smmu-monaco.dtsi"
		#include "monaco-ion.dtsi"
		#include "monaco-gdsc.dtsi"
		#include "monaco-qupv3.dtsi"

		&qupv3_se6_2uart {
		status = "ok";
		};

		&gcc_camss_top_gdsc {
		status = "ok";