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Commit 9bff9dfc authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 

Pull spi updates from Mark Brown:
 "One small feature was added this release but the bulk of the diffstat
  and the changelog comes from the fact that several older drivers got
  some fairly hefty reworks and a couple of new drivers were added:

   - Support for detailed control of timing around chip selects from
     Sowjanya Komatineni.

   - A big set of fixes and imrovements for the Tegra114 driver from
     Sowjanya Komatineni.

   - A big simplification of the GPIO driver from Andrey Smirnov.

   - DMA support and fixes for the Freescale LPSPI driver from Clark
     Wang.

   - Fixes and optimizations for the bcm2835aux from Martin Sparl.

   - New drivers for Mediatek MT7621 (graduated from staging) and Zynq
     QSPI"

[ This is a so-called "evil merge" that additionally removes a warning
  due to an unused variable 'i' introduced by commit 1dfbf334 ("spi:
  ep93xx: Convert to use CS GPIO descriptors")     - Linus ]

* tag 'spi-v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (127 commits)
  spi: rspi: Fix handling of QSPI code when transmit and receive
  spi: atmel-quadspi: fix crash while suspending
  spi: stm32: return the get_irq error
  spi: tegra114: fix PIO transfer
  spi: pxa2xx: fix SCR (divisor) calculation
  spi: Clear SPI_CS_HIGH flag from bad_bits for GPIO chip-select
  spi: ep93xx: Convert to use CS GPIO descriptors
  spi: AD ASoC: declare missing of table
  spi: spi-mem: zynq-qspi: Fix build error on architectures missing readsl/writesl
  spi: stm32-qspi: manage the get_irq error case
  spi/spi-bcm2835: Split transfers that exceed DLEN
  spi: expand mode support
  dt-bindings: spi: spi-mt65xx: add support for MT8516
  spi: pxa2xx: Add support for Intel Comet Lake
  spi/trace: Cap buffer contents at 64 bytes
  spi: Release spi_res after finalizing message
  spi: Remove warning in spi_split_transfers_maxsize()
  spi: Remove one needless transfer speed fall back case
  spi: sh-msiof: Document r8a77470 bindings
  spi: pxa2xx: use a module softdep for dw_dmac
  ...
parents 61be53f9 2e5f0810

Documentation/devicetree/bindings/spi/fsl-spi.txt

+4 −0
Original line number Diff line number Diff line
@@ -18,6 +18,10 @@ Optional properties: 
- gpios : specifies the gpio pins to be used for chipselects.

  The gpios will be referred to as reg = <index> in the SPI child nodes.

  If unspecified, a single SPI device without a chip select can be used.

- fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the

  SPISEL_BOOT signal is used as chip select for a slave device. Use

  reg = <number of gpios> in the corresponding child node, i.e. 0 if

  the gpios property is not present.



Example:

	spi@4c0 {

Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt

+20 −0
Original line number Diff line number Diff line
@@ -23,6 +23,18 @@ Required properties: 
Recommended properties:

- spi-max-frequency: Definition as per

                     Documentation/devicetree/bindings/spi/spi-bus.txt

Optional properties:

- nvidia,tx-clk-tap-delay: Delays the clock going out to the external device

  with this tap value. This property is used to tune the outgoing data from

  Tegra SPI master with respect to outgoing Tegra SPI master clock.

  Tap values vary based on the platform design trace lengths from Tegra SPI

  to corresponding slave devices. Valid tap values are from 0 thru 63.

- nvidia,rx-clk-tap-delay: Delays the clock coming in from the external device

  with this tap value. This property is used to adjust the Tegra SPI master

  clock with respect to the data from the SPI slave device.

  Tap values vary based on the platform design trace lengths from Tegra SPI

  to corresponding slave devices. Valid tap values are from 0 thru 63.



Example:



spi@7000d600 {
@@ -38,4 +50,12 @@ spi@7000d600 { 
	reset-names = "spi";

	dmas = <&apbdma 16>, <&apbdma 16>;

	dma-names = "rx", "tx";

	<spi-client>@<bus_num> {

		...

		...

		nvidia,rx-clk-tap-delay = <0>;

		nvidia,tx-clk-tap-delay = <16>;

		...

	};



};

Documentation/devicetree/bindings/spi/sh-msiof.txt

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ Required properties: 
- compatible           : "renesas,msiof-r8a7743" (RZ/G1M)

			 "renesas,msiof-r8a7744" (RZ/G1N)

			 "renesas,msiof-r8a7745" (RZ/G1E)

			 "renesas,msiof-r8a77470" (RZ/G1C)

			 "renesas,msiof-r8a774a1" (RZ/G2M)

			 "renesas,msiof-r8a774c0" (RZ/G2E)

			 "renesas,msiof-r8a7790" (R-Car H2)

Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt

+9 −1
Original line number Diff line number Diff line
@@ -8,9 +8,16 @@ Required properties: 
- interrupts : One interrupt, used by the controller.

- #address-cells : <1>, as required by generic SPI binding.

- #size-cells : <0>, also as required by generic SPI binding.

- clocks : phandles for the clocks, see the description of clock-names below.

   The phandle for the "ssi_clk" is required. The phandle for the "pclk" clock

   is optional. If a single clock is specified but no clock-name, it is the

   "ssi_clk" clock. If both clocks are listed, the "ssi_clk" must be first.



Optional properties:

- cs-gpios : Specifies the gpio pis to be used for chipselects.

- clock-names : Contains the names of the clocks:

    "ssi_clk", for the core clock used to generate the external SPI clock.

    "pclk", the interface clock, required for register access.

- cs-gpios : Specifies the gpio pins to be used for chipselects.

- num-cs : The number of chipselects. If omitted, this will default to 4.

- reg-io-width : The I/O register width (in bytes) implemented by this

  device.  Supported values are 2 or 4 (the default).
@@ -25,6 +32,7 @@ Example: 
		interrupts = <0 154 4>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&spi_m_clk>;

		num-cs = <2>;

		cs-gpios = <&gpio0 13 0>,

			   <&gpio0 14 0>;

Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt

+8 −2
Original line number Diff line number Diff line
@@ -7,7 +7,11 @@ Required properties: 
- reg : address and length of the lpspi master registers

- interrupt-parent : core interrupt controller

- interrupts : lpspi interrupt

- clocks : lpspi clock specifier

- clocks : lpspi clock specifier. Its number and order need to correspond to the

	   value in clock-names.

- clock-names : Corresponding to per clock and ipg clock in "clocks"

		respectively. In i.MX7ULP, it only has per clk, so use CLK_DUMMY

		to fill the "ipg" blank.

- spi-slave : spi slave mode support. In slave mode, add this attribute without

	      value. In master mode, remove it.
@@ -18,6 +22,8 @@ lpspi2: lpspi@40290000 { 
	reg = <0x40290000 0x10000>;

	interrupt-parent = <&intc>;

	interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

	clocks = <&clks IMX7ULP_CLK_LPSPI2>;

	clocks = <&clks IMX7ULP_CLK_LPSPI2>,

		 <&clks IMX7ULP_CLK_DUMMY>;

	clock-names = "per", "ipg";

	spi-slave;

};