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Commit 9b4ba4be authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: update default devfreq governors on lahaina"

parents d481d5ae 5b3c174f

qcom/lahaina.dtsi

+19 −19
Original line number Diff line number Diff line
@@ -3617,7 +3617,7 @@ 


	cpu_cpu_llcc_bw: qcom,cpu-cpu-llcc-bw {

		compatible = "qcom,devfreq-icc";

		governor = "performance";

		governor = "bw_hwmon";

		interconnects = <&gem_noc MASTER_APPSS_PROC &gem_noc SLAVE_LLCC>;

		qcom,active-only;

		operating-points-v2 = <&llcc_bw_opp_table>;
@@ -3636,7 +3636,7 @@ 


	cpu_llcc_ddr_bw: qcom,cpu-llcc-ddr-bw {

		compatible = "qcom,devfreq-icc-ddr";

		governor = "performance";

		governor = "bw_hwmon";

		interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;
@@ -3656,7 +3656,7 @@ 
		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "performance";

		governor = "mem_latency";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_CPU0>;
@@ -3666,7 +3666,7 @@ 
		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "performance";

		governor = "mem_latency";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_CPU1>;
@@ -3676,7 +3676,7 @@ 
		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "performance";

		governor = "mem_latency";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_CPU2>;
@@ -3686,7 +3686,7 @@ 
		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "performance";

		governor = "mem_latency";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_CPU3>;
@@ -3696,7 +3696,7 @@ 
		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "performance";

		governor = "mem_latency";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_CPU4>;
@@ -3706,7 +3706,7 @@ 
		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "performance";

		governor = "mem_latency";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_CPU5>;
@@ -3716,7 +3716,7 @@ 
		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "performance";

		governor = "mem_latency";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_CPU6>;
@@ -3726,7 +3726,7 @@ 
		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "performance";

		governor = "mem_latency";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_CPU7>;
@@ -3737,7 +3737,7 @@ 
		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		qcom,bus-width = <32>;

		governor = "powersave";

		governor = "bw_hwmon";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_SHARED>;
@@ -3756,7 +3756,7 @@ 


	cpu0_cpu_llcc_lat: qcom,cpu0-cpu-llcc-lat {

		compatible = "qcom,devfreq-icc";

		governor = "performance";

		governor = "mem_latency";

		interconnects = <&gem_noc MASTER_APPSS_PROC &gem_noc SLAVE_LLCC>;

		qcom,active-only;

		operating-points-v2 = <&llcc_bw_opp_table>;
@@ -3764,7 +3764,7 @@ 


	cpu4_cpu_llcc_lat: qcom,cpu4-cpu-llcc-lat {

		compatible = "qcom,devfreq-icc";

		governor = "performance";

		governor = "mem_latency";

		interconnects = <&gem_noc MASTER_APPSS_PROC &gem_noc SLAVE_LLCC>;

		qcom,active-only;

		operating-points-v2 = <&llcc_bw_opp_table>;
@@ -3772,7 +3772,7 @@ 


	cpu0_llcc_ddr_lat: qcom,cpu0-llcc-ddr-lat {

		compatible = "qcom,devfreq-icc-ddr";

		governor = "performance";

		governor = "mem_latency";

		interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;
@@ -3780,7 +3780,7 @@ 


	cpu4_llcc_ddr_lat: qcom,cpu4-llcc-ddr-lat {

		compatible = "qcom,devfreq-icc-ddr";

		governor = "performance";

		governor = "mem_latency";

		interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;
@@ -3788,7 +3788,7 @@ 


	cpu4_cpu_ddr_latfloor: qcom,cpu4-cpu-ddr-latfloor {

		compatible = "qcom,devfreq-icc-ddr";

		governor = "performance";

		governor = "compute";

		interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;
@@ -3796,7 +3796,7 @@ 


	cpu4_cpu_llcc_latfloor: qcom,cpu4-cpu-llcc-latfloor {

		compatible = "qcom,devfreq-icc";

		governor = "performance";

		governor = "compute";

		interconnects = <&gem_noc MASTER_APPSS_PROC &gem_noc SLAVE_LLCC>;

		qcom,active-only;

		operating-points-v2 = <&llcc_bw_opp_table>;
@@ -3804,7 +3804,7 @@ 


	cpu7_cpu_ddr_latfloor: qcom,cpu7-cpu-ddr-latfloor {

		compatible = "qcom,devfreq-icc-ddr";

		governor = "performance";

		governor = "mem_latency";

		interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;
@@ -3812,7 +3812,7 @@ 


	cpu4_cpu_ddr_qoslat: qcom,cpu4-cpu-ddr-qoslat {

		compatible = "qcom,devfreq-qoslat";

		governor = "powersave";

		governor = "mem_latency";

		operating-points-v2 = <&qoslat_opp_table>;

		mboxes = <&qmp_aop 0>;

	};