disp: msm: fix rsc static wakeup time calculation

Currently RSC timer register programming is optimized for updating
only during timing param changes and not during RSC state changes
with same timing. Static wakeup time computation should consider
panel jitter for RSC clk state too, else it can result in RSC hang.
This change also removes extra logic for video mode prefil lines
computation for rsc config as video mode does not enable RSC solver.
Current issue scenario exposing the hang is in dual dsi display scenario
where RSC is in clock state and static wakeup time is programmed by
not considering panel jitter, after suspend/pmsuspend while waking up
if RSC switches to command state if primary enabled first and vsync
may arrive much early based on the panel jitter. RSC hw can not handle
if TE arrives earlier than static wakeup time causing RSC hang.

Change-Id: I1434fdd71eb04fdbe22b3601500493c818e9126d
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>