Loading qcom/shima-coresight.dtsi +3 −0 Original line number Diff line number Diff line Loading @@ -1210,6 +1210,7 @@ reg-names = "tpdm-base"; qcom,cmb-msr-skip; status = "disabled"; coresight-name = "coresight-tpdm-sdcc-4"; clocks = <&aopcc QDSS_CLK>; Loading Loading @@ -1372,6 +1373,7 @@ reg-names = "tpdm-base"; qcom,cmb-msr-skip; status = "disabled"; coresight-name = "coresight-tpdm-sdcc-1"; clocks = <&aopcc QDSS_CLK>; Loading @@ -1394,6 +1396,7 @@ reg-names = "tpdm-base"; qcom,cmb-msr-skip; status = "disabled"; coresight-name = "coresight-tpdm-sdcc-2"; clocks = <&aopcc QDSS_CLK>; Loading Loading
qcom/shima-coresight.dtsi +3 −0 Original line number Diff line number Diff line Loading @@ -1210,6 +1210,7 @@ reg-names = "tpdm-base"; qcom,cmb-msr-skip; status = "disabled"; coresight-name = "coresight-tpdm-sdcc-4"; clocks = <&aopcc QDSS_CLK>; Loading Loading @@ -1372,6 +1373,7 @@ reg-names = "tpdm-base"; qcom,cmb-msr-skip; status = "disabled"; coresight-name = "coresight-tpdm-sdcc-1"; clocks = <&aopcc QDSS_CLK>; Loading @@ -1394,6 +1396,7 @@ reg-names = "tpdm-base"; qcom,cmb-msr-skip; status = "disabled"; coresight-name = "coresight-tpdm-sdcc-2"; clocks = <&aopcc QDSS_CLK>; Loading