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Commit 9844984a authored by Elson Roy Serrao's avatar Elson Roy Serrao
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ARM: dts: msm: Increase the dwc3 reg address range for Lahaina 

The register address range for Lahaina is not covering all the
controller registers. Tuning the Tx deemph registers for dwc3
gen2 protocol test is not possible with the current range.
Modify the reg property to cover the entire range as defined in
the data book to fix this issue.

Change-Id: I34b605f920af7cae8b2efd69a54f96e8cde5c001
parent 28ac5c4a

qcom/lahaina-usb.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ 


		dwc3@a600000 {

			compatible = "snps,dwc3";

			reg = <0xa600000 0xcd00>;

			reg = <0xa600000 0xd93c>;

			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;

			usb-phy = <&usb2_phy0>, <&usb_qmp_dp_phy>;

			linux,sysdev_is_parent;
@@ -376,7 +376,7 @@ 


		dwc3@a800000 {

			compatible = "snps,dwc3";

			reg = <0xa800000 0xcd00>;

			reg = <0xa800000 0xd93c>;

			interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;

			usb-phy = <&usb2_phy1>, <&usb_qmp_phy>;

			linux,sysdev_is_parent;