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Commit 28ac5c4a authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "Revert "dt-bindings: msm: vidc: Clean-up dt properties""

parents 91fc1045 6c1f6a25
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+53 −25
Original line number Diff line number Diff line
@@ -5,18 +5,17 @@ Venus
=====
Required properties:
- compatible : one of:
	- "msm-vidc"
	- "lahaina-vidc" : Invokes driver-specific data for LAHAINA.
	- "qcom,msm-vidc"
	- "qcom,lahaina-vidc" : Invokes driver-specific data for LAHAINA.

Optional properties:
- reg : offset and length of the register set for the device.
- sku-index : sku version of the hardware.
- interrupts : should contain the vidc interrupt.
- vidc,reg-presets : list of offset-value-mask trios for registers to be written.
- qcom,reg-presets : list of offset-value pairs for registers to be written.
	The offsets are from the base offset specified in 'reg'. This is mainly
	used for QoS, VBIF, etc. presets for video. The mask specifies which bits
	of the register to update
- vidc,qdss-presets : list of physical address and memory allocation size pairs.
	used for QoS, VBIF, etc. presets for video.
- qcom,qdss-presets : list of physical address and memory allocation size pairs.
	when fw_debug_mode is set as HFI_DEBUG_MODE_QDSS, all firmware messages will be
	written to QDSS memory.
- *-supply: A phandle pointing to the appropriate regulator. Number of
@@ -24,17 +23,17 @@ Optional properties:
- clock-names: an array of clocks that the driver is supposed to be
	manipulating. The clocks names here correspond to the clock names used in
	clk_get(<name>).
- vidc,proxy-clock-names:
- vidc,clock-configs = an array of bitmaps of clocks' configurations. The index
	of the bitmap corresponds to the clock at the same index in vidc,clock-names.
- qcom,proxy-clock-names:
- qcom,clock-configs = an array of bitmaps of clocks' configurations. The index
	of the bitmap corresponds to the clock at the same index in qcom,clock-names.
	The bitmaps describes the actions that the device needs to take regarding the
	clock (i.e. scale it based on load).

	The bitmap is defined as:
	scalable = 0x1 (if the driver should vary the clock's frequency based on load)
- vidc,allowed-clock-rates = an array of supported clock rates by the chipset.
- vidc,clock-freq-tbl = node containing individual domain nodes, each with:
	- vidc,codec-mask: a bitmap of supported codec types, every two bits
- qcom,allowed-clock-rates = an array of supported clock rates by the chipset.
- qcom,clock-freq-tbl = node containing individual domain nodes, each with:
	- qcom,codec-mask: a bitmap of supported codec types, every two bits
	represents a codec type.
		supports mvc encoder = 0x00000001
		supports mvc decoder = 0x00000003
@@ -52,9 +51,9 @@ Optional properties:
		supports vp8 decoder = 0x03000000
		supports hevc encoder = 0x04000000
		supports hevc decoder = 0x0c000000
	- vidc,cycles-per-mb: number of cycles required to process each macro
	- qcom,cycles-per-mb: number of cycles required to process each macro
		block.
	- vidc,low-power-cycles-per-mb: number of cycles required to process each
	- qcom,low-power-cycles-per-mb: number of cycles required to process each
		macro block in low power mode.
		the required frequency to get the final frequency, the factor is
		represented in Q16 format.
@@ -62,6 +61,25 @@ Optional properties:
	signal that affects the device, or that the device manages.
- reset-names: List of reset signal name strings sorted in the same order as
	the resets property.
- qcom,vidc-iommu-domains = node containing individual domain nodes, each with:
		- a unique domain name for the domain node (e.g vidc,domain-ns)
		- qcom,vidc-domain-phandle: phandle for the domain as defined in
		 <target>-iommu-domains.dtsi (e.g msm8974-v1-iommu-domains.dtsi)
		- qcom,vidc-buffer-types: bitmap of buffer types that can be mapped into each
		 IOMMU domain.
		 - Buffer types are defined as the following:
			input = 0x1
			output = 0x2
			output2 = 0x4
			extradata input = 0x8
			extradata output = 0x10
			extradata output2 = 0x20
			internal scratch = 0x40
			internal scratch1 = 0x80
			internal scratch2 = 0x100
			internal persist = 0x200
			internal persist1 = 0x400
			internal cmd queue = 0x800
- cache-slice-names = An array of supported cache slice names by llcc
- cache-slices = An array of supported cache slice ids corresponding
	to cache-slice-names by llcc
@@ -71,7 +89,7 @@ Optional properties:
- interconnect-names : List of interconnect path name strings sorted in the same
	order as the interconnects property. Driver will use interconnect-names to match
	interconnect paths with interconnect specifier pairs.
- vidc,bus-range-kbps : An array of ranges (<min max>) that indicate the
- qcom,bus-range-kbps : An array of ranges (<min max>) that indicate the
	minimum and maximum acceptable votes for the bus.
	In the absence of this property, <0 INT_MAX> is used.

@@ -80,7 +98,7 @@ Context Banks
=============
Required properties:
- compatible : one of:
	- "msm-vidc-context-bank"
	- "qcom,msm-vidc,context-bank"
- iommus : A phandle parsed by smmu driver. Number of entries will vary
	across targets.

@@ -105,22 +123,32 @@ Optional properties:
- qcom,secure-context-bank : bool indicating secure context bank.


Memory Heaps
============
Required properties:
- compatible : one of:
	- "qcom,msm-vidc,mem-adsp"
	- "qcom,msm-vidc,mem-cdsp"
- memory-region : phandle to the memory heap/region.

Example:

	vidc@aa00000 {
		compatible = "msm-vidc";
	qcom,vidc@fdc00000 {
		compatible = "qcom,msm-vidc";
		reg = <0xfdc00000 0xff000>;
		interrupts = <0 44 0>;
		venus-supply = <&gdsc>;
		venus-core0-supply = <&gdsc1>;
		venus-core1-supply = <&gdsc2>;
		vidc,reg-presets = <0x80004 0x1>,
		qcom,reg-presets = <0x80004 0x1>,
			<0x80178 0x00001FFF>;
		vidc,qdss-presets = <0xFC307000 0x1000>,
		qcom,qdss-presets = <0xFC307000 0x1000>,
			<0xFC322000 0x1000>;
		clock-names = "foo_clk", "bar_clk", "baz_clk";
		vidc,clock-configs = <0x3 0x1 0x0>;
		vidc,allowed-clock-rates = <200000000 300000000 400000000>;
		qcom,clock-configs = <0x3 0x1 0x0>;
		qcom,buffer-type-tz-usage-table = <0x1 0x1>,
						<0x1fe 0x2>;
		qcom,allowed-clock-rates = <200000000 300000000 400000000>;

		/* Bus Interconnects */
		interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc";
@@ -131,11 +159,11 @@ Example:
				<&mmss_noc MASTER_VIDEO_P0
					&gem_noc SLAVE_LLCC>;
		/* Bus BW range (low, high) for each bus */
		vidc,bus-range-kbps = <1000 1000
		qcom,bus-range-kbps = <1000 1000
					1000 15000000
					1000 15000000>;
		non_secure_cb {
			compatible = "msm-vidc-context-bank";
			compatible = "qcom,msm-vidc,context-bank";
			label = "venus_ns";
			iommus =
				<&apps_smmu 0x1300 0x60>;