Loading tools/include/uapi/linux/in.h +1 −1 Original line number Diff line number Diff line Loading @@ -268,7 +268,7 @@ struct sockaddr_in { #define IN_MULTICAST(a) IN_CLASSD(a) #define IN_MULTICAST_NET 0xe0000000 #define IN_BADCLASS(a) ((((long int) (a) ) == 0xffffffff) #define IN_BADCLASS(a) (((long int) (a) ) == (long int)0xffffffff) #define IN_EXPERIMENTAL(a) IN_BADCLASS((a)) #define IN_CLASSE(a) ((((long int) (a)) & 0xf0000000) == 0xf0000000) Loading tools/perf/Documentation/perf-c2c.txt +12 −4 Original line number Diff line number Diff line Loading @@ -19,8 +19,11 @@ C2C stands for Cache To Cache. The perf c2c tool provides means for Shared Data C2C/HITM analysis. It allows you to track down the cacheline contentions. The tool is based on x86's load latency and precise store facility events provided by Intel CPUs. These events provide: On x86, the tool is based on load latency and precise store facility events provided by Intel CPUs. On PowerPC, the tool uses random instruction sampling with thresholding feature. These events provide: - memory address of the access - type of the access (load and store details) - latency (in cycles) of the load access Loading @@ -46,7 +49,7 @@ RECORD OPTIONS -l:: --ldlat:: Configure mem-loads latency. Configure mem-loads latency. (x86 only) -k:: --all-kernel:: Loading Loading @@ -119,11 +122,16 @@ Following perf record options are configured by default: -W,-d,--phys-data,--sample-cpu Unless specified otherwise with '-e' option, following events are monitored by default: default on x86: cpu/mem-loads,ldlat=30/P cpu/mem-stores/P and following on PowerPC: cpu/mem-loads/ cpu/mem-stores/ User can pass any 'perf record' option behind '--' mark, like (to enable callchains and system wide monitoring): Loading tools/perf/Documentation/perf-mem.txt +1 −1 Original line number Diff line number Diff line Loading @@ -82,7 +82,7 @@ RECORD OPTIONS Be more verbose (show counter open errors, etc) --ldlat <n>:: Specify desired latency for loads event. Specify desired latency for loads event. (x86 only) In addition, for report all perf report options are valid, and for record all perf record options. Loading tools/perf/arch/powerpc/util/Build +1 −0 Original line number Diff line number Diff line Loading @@ -2,6 +2,7 @@ libperf-y += header.o libperf-y += sym-handling.o libperf-y += kvm-stat.o libperf-y += perf_regs.o libperf-y += mem-events.o libperf-$(CONFIG_DWARF) += dwarf-regs.o libperf-$(CONFIG_DWARF) += skip-callchain-idx.o Loading tools/perf/arch/powerpc/util/mem-events.c 0 → 100644 +11 −0 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 #include "mem-events.h" /* PowerPC does not support 'ldlat' parameter. */ char *perf_mem_events__name(int i) { if (i == PERF_MEM_EVENTS__LOAD) return (char *) "cpu/mem-loads/"; return (char *) "cpu/mem-stores/"; } Loading
tools/include/uapi/linux/in.h +1 −1 Original line number Diff line number Diff line Loading @@ -268,7 +268,7 @@ struct sockaddr_in { #define IN_MULTICAST(a) IN_CLASSD(a) #define IN_MULTICAST_NET 0xe0000000 #define IN_BADCLASS(a) ((((long int) (a) ) == 0xffffffff) #define IN_BADCLASS(a) (((long int) (a) ) == (long int)0xffffffff) #define IN_EXPERIMENTAL(a) IN_BADCLASS((a)) #define IN_CLASSE(a) ((((long int) (a)) & 0xf0000000) == 0xf0000000) Loading
tools/perf/Documentation/perf-c2c.txt +12 −4 Original line number Diff line number Diff line Loading @@ -19,8 +19,11 @@ C2C stands for Cache To Cache. The perf c2c tool provides means for Shared Data C2C/HITM analysis. It allows you to track down the cacheline contentions. The tool is based on x86's load latency and precise store facility events provided by Intel CPUs. These events provide: On x86, the tool is based on load latency and precise store facility events provided by Intel CPUs. On PowerPC, the tool uses random instruction sampling with thresholding feature. These events provide: - memory address of the access - type of the access (load and store details) - latency (in cycles) of the load access Loading @@ -46,7 +49,7 @@ RECORD OPTIONS -l:: --ldlat:: Configure mem-loads latency. Configure mem-loads latency. (x86 only) -k:: --all-kernel:: Loading Loading @@ -119,11 +122,16 @@ Following perf record options are configured by default: -W,-d,--phys-data,--sample-cpu Unless specified otherwise with '-e' option, following events are monitored by default: default on x86: cpu/mem-loads,ldlat=30/P cpu/mem-stores/P and following on PowerPC: cpu/mem-loads/ cpu/mem-stores/ User can pass any 'perf record' option behind '--' mark, like (to enable callchains and system wide monitoring): Loading
tools/perf/Documentation/perf-mem.txt +1 −1 Original line number Diff line number Diff line Loading @@ -82,7 +82,7 @@ RECORD OPTIONS Be more verbose (show counter open errors, etc) --ldlat <n>:: Specify desired latency for loads event. Specify desired latency for loads event. (x86 only) In addition, for report all perf report options are valid, and for record all perf record options. Loading
tools/perf/arch/powerpc/util/Build +1 −0 Original line number Diff line number Diff line Loading @@ -2,6 +2,7 @@ libperf-y += header.o libperf-y += sym-handling.o libperf-y += kvm-stat.o libperf-y += perf_regs.o libperf-y += mem-events.o libperf-$(CONFIG_DWARF) += dwarf-regs.o libperf-$(CONFIG_DWARF) += skip-callchain-idx.o Loading
tools/perf/arch/powerpc/util/mem-events.c 0 → 100644 +11 −0 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 #include "mem-events.h" /* PowerPC does not support 'ldlat' parameter. */ char *perf_mem_events__name(int i) { if (i == PERF_MEM_EVENTS__LOAD) return (char *) "cpu/mem-loads/"; return (char *) "cpu/mem-stores/"; }