Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 975c91f5 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add handles for PCIE clocks"

parents 01cb0101 0f0af0a5

qcom/shima-pcie.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@ 
			RPMH_REGULATOR_LEVEL_NOM 100000000>; /* Gen3 */



		interconnect-names = "icc_path";

		interconnects = <&aggre2_noc MASTER_PCIE_0 &mc_virt SLAVE_EBI1>;

		interconnects = <&aggre1_noc MASTER_PCIE_0 &mc_virt SLAVE_EBI1>;



		clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,

			<&rpmhcc RPMH_CXO_CLK>,

qcom/shima.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -2061,7 +2061,9 @@ 
		#interconnect-cells = <1>;

		qcom,bcm-voter-names = "hlos";

		qcom,bcm-voters = <&apps_bcm_voter>;

		clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,

		clocks = <&gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,

			<&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,

			<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,

			<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;

	};
@@ -2071,9 +2073,7 @@ 
		#interconnect-cells = <1>;

		qcom,bcm-voter-names = "hlos";

		qcom,bcm-voters = <&apps_bcm_voter>;

		clocks = <&gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,

			<&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,

			<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,

		clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,

			<&rpmhcc RPMH_IPA_CLK>;

	};