Merge "ARM: dts: msm: Update PCIe1 PHY settings to v1.04 for lahaina" (94fad7e9) · Commits · e / devices / android_kernel_fairphone_FP5

qcom/lahaina-pcie.dtsi

+42 −27

Original line number	Diff line number	Diff line
		@@ -337,12 +337,12 @@
		qcom,slv-addr-space-size = <0x20000000>;
		qcom,ep-latency = <10>;

		qcom,pcie-phy-ver = <11031>;
		qcom,pcie-phy-ver = <1104>;
		qcom,phy-status-offset = <0x214>;
		qcom,phy-status-bit = <6>;
		qcom,phy-power-down-offset = <0x240>;
		qcom,phy-sequence = <0x0240 0x03 0x0
		0x0010 0x00 0x0
		0x0010 0x01 0x0
		0x001c 0x31 0x0
		0x0020 0x01 0x0
		0x0024 0xde 0x0
		@@ -378,36 +378,51 @@
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