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Commit 925c5c32 authored by Kunihiko Hayashi's avatar Kunihiko Hayashi Committed by Masahiro Yamada
Browse files

arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3 



Add nodes of SPI controller for UniPhier SoCs.

Signed-off-by: default avatarKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent 92fa4f4c

arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -116,6 +116,28 @@ 
		#size-cells = <1>;

		ranges = <0 0 0 0xffffffff>;



		spi0: spi@54006000 {

			compatible = "socionext,uniphier-scssi";

			status = "disabled";

			reg = <0x54006000 0x100>;

			interrupts = <0 39 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi0>;

			clocks = <&peri_clk 11>;

			resets = <&peri_rst 11>;

		};



		spi1: spi@54006100 {

			compatible = "socionext,uniphier-scssi";

			status = "disabled";

			reg = <0x54006100 0x100>;

			interrupts = <0 216 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi1>;

			clocks = <&peri_clk 11>;

			resets = <&peri_rst 11>;

		};



		serial0: serial@54006800 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi

+44 −0
Original line number Diff line number Diff line
@@ -224,6 +224,50 @@ 
		#size-cells = <1>;

		ranges = <0 0 0 0xffffffff>;



		spi0: spi@54006000 {

			compatible = "socionext,uniphier-scssi";

			status = "disabled";

			reg = <0x54006000 0x100>;

			interrupts = <0 39 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi0>;

			clocks = <&peri_clk 11>;

			resets = <&peri_rst 11>;

		};



		spi1: spi@54006100 {

			compatible = "socionext,uniphier-scssi";

			status = "disabled";

			reg = <0x54006100 0x100>;

			interrupts = <0 216 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi1>;

			clocks = <&peri_clk 11>;

			resets = <&peri_rst 11>;

		};



		spi2: spi@54006200 {

			compatible = "socionext,uniphier-scssi";

			status = "disabled";

			reg = <0x54006200 0x100>;

			interrupts = <0 229 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi2>;

			clocks = <&peri_clk 11>;

			resets = <&peri_rst 11>;

		};



		spi3: spi@54006300 {

			compatible = "socionext,uniphier-scssi";

			status = "disabled";

			reg = <0x54006300 0x100>;

			interrupts = <0 230 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi3>;

			clocks = <&peri_clk 11>;

			resets = <&peri_rst 11>;

		};



		serial0: serial@54006800 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -144,6 +144,28 @@ 
		#size-cells = <1>;

		ranges = <0 0 0 0xffffffff>;



		spi0: spi@54006000 {

			compatible = "socionext,uniphier-scssi";

			status = "disabled";

			reg = <0x54006000 0x100>;

			interrupts = <0 39 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi0>;

			clocks = <&peri_clk 11>;

			resets = <&peri_rst 11>;

		};



		spi1: spi@54006100 {

			compatible = "socionext,uniphier-scssi";

			status = "disabled";

			reg = <0x54006100 0x100>;

			interrupts = <0 216 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi1>;

			clocks = <&peri_clk 11>;

			resets = <&peri_rst 11>;

		};



		serial0: serial@54006800 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";