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Commit 8d8f6f70 authored by Dave Airlie's avatar Dave Airlie
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Merge tag 'drm-misc-next-2019-04-18' of git://anongit.freedesktop.org/drm/drm-misc into drm-next 



drm-misc-next for v5.2:

UAPI Changes:
- Document which feature flags belong to which command in virtio_gpu.h
- Make the FB_DAMAGE_CLIPS available for atomic userspace only, it's useless for legacy.

Cross-subsystem Changes:
- Add device tree bindings for lg,acx467akm-7 panel and ST-Ericsson Multi Channel Display Engine MCDE
- Add parameters to the device tree bindings for tfp410
- iommu/io-pgtable: Add ARM Mali midgard MMU page table format
- dma-buf: Only do a 64-bits seqno compare when driver explicitly asks for it, else wraparound.
- Use the 64-bits compare for dma-fence-chains

Core Changes:
- Make the fb conversion functions use __iomem dst.
- Rename drm_client_add to drm_client_register
- Move intel_fb_initial_config to core.
- Add a drm_gem_objects_lookup helper
- Add drm_gem_fence_array helpers, and use it in lima.
- Add drm_format_helper.c to kerneldoc.

Driver Changes:
- Add panfrost driver for mali midgard/bitfrost.
- Converts bochs to use the simple display type.
- Small fixes to sun4i, tinydrm, ti-fp410.
- Fid aspeed's Kconfig options.
- Make some symbols/functions static in lima, sun4i and meson.
- Add a driver for the lg,acx467akm-7 panel.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/737ad994-213d-45b5-207a-b99d795acd21@linux.intel.com
parents b1c4f7fe debcd8f9

Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt

+9 −1
Original line number Diff line number Diff line
@@ -18,7 +18,14 @@ This device has two video ports. Their connections are modeled using the OF 
graph bindings specified in [1]. Each port node shall have a single endpoint.



- Port 0 is the DPI input port. Its endpoint subnode shall contain a

  pclk-sample property and a remote-endpoint property as specified in [1].

  pclk-sample and bus-width property and a remote-endpoint property as specified

  in [1].

  - If pclk-sample is not defined, pclk-sample = 0 should be assumed for

    backward compatibility.

  - If bus-width is not defined then bus-width = 24 should be assumed for

    backward compatibility.

    bus-width = 24: 24 data lines are connected and single-edge mode

    bus-width = 12: 12 data lines are connected and dual-edge mode



- Port 1 is the DVI output port. Its endpoint subnode shall contain a

  remote-endpoint property is specified in [1].
@@ -43,6 +50,7 @@ tfp410: encoder@0 { 


			tfp410_in: endpoint@0 {

				pclk-sample = <1>;

				bus-width = <24>;

				remote-endpoint = <&dpi_out>;

			};

		};

Documentation/devicetree/bindings/display/panel/lg,acx467akm-7.txt

0 → 100644
+7 −0
Original line number Diff line number Diff line 
LG ACX467AKM-7 4.95" 1080×1920 LCD Panel



Required properties:

- compatible: must be "lg,acx467akm-7"



This binding is compatible with the simple-panel binding, which is specified

in simple-panel.txt in this directory.

Documentation/devicetree/bindings/display/ste,mcde.txt

0 → 100644
+104 −0
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ST-Ericsson Multi Channel Display Engine MCDE



The ST-Ericsson MCDE is a display controller with support for compositing

and displaying several channels memory resident graphics data on DSI or

LCD displays or bridges. It is used in the ST-Ericsson U8500 platform.



Required properties:



- compatible: must be:

  "ste,mcde"

- reg: register base for the main MCDE control registers, should be

  0x1000 in size

- interrupts: the interrupt line for the MCDE

- epod-supply: a phandle to the EPOD regulator

- vana-supply: a phandle to the analog voltage regulator

- clocks: an array of the MCDE clocks in this strict order:

  MCDECLK (main MCDE clock), LCDCLK (LCD clock), PLLDSI

  (HDMI clock), DSI0ESCLK (DSI0 energy save clock),

  DSI1ESCLK (DSI1 energy save clock), DSI2ESCLK (DSI2 energy

  save clock)

- clock-names: must be the following array:

  "mcde", "lcd", "hdmi"

  to match the required clock inputs above.

- #address-cells: should be <1> (for the DSI hosts that will be children)

- #size-cells: should be <1> (for the DSI hosts that will be children)

- ranges: this should always be stated



Required subnodes:



The devicetree must specify subnodes for the DSI host adapters.

These must have the following characteristics:



- compatible: must be:

  "ste,mcde-dsi"

- reg: must specify the register range for the DSI host

- vana-supply: phandle to the VANA voltage regulator

- clocks: phandles to the high speed and low power (energy save) clocks

  the high speed clock is not present on the third (dsi2) block, so it

  should only have the "lp" clock

- clock-names: "hs" for the high speed clock and "lp" for the low power

  (energy save) clock

- #address-cells: should be <1>

- #size-cells: should be <0>



Display panels and bridges will appear as children on the DSI hosts, and

the displays are connected to the DSI hosts using the common binding

for video transmitter interfaces; see

Documentation/devicetree/bindings/media/video-interfaces.txt



If a DSI host is unused (not connected) it will have no children defined.



Example:



mcde@a0350000 {

	compatible = "ste,mcde";

	reg = <0xa0350000 0x1000>;

	interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;

	epod-supply = <&db8500_b2r2_mcde_reg>;

	vana-supply = <&ab8500_ldo_ana_reg>;

	clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */

		 <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */

		 <&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */

	clock-names = "mcde", "lcd", "hdmi";

	#address-cells = <1>;

	#size-cells = <1>;

	ranges;



	dsi0: dsi@a0351000 {

		compatible = "ste,mcde-dsi";

		reg = <0xa0351000 0x1000>;

		vana-supply = <&ab8500_ldo_ana_reg>;

		clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;

		clock-names = "hs", "lp";

		#address-cells = <1>;

		#size-cells = <0>;



		panel {

			compatible = "samsung,s6d16d0";

			reg = <0>;

			vdd1-supply = <&ab8500_ldo_aux1_reg>;

			reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;

		};



	};

	dsi1: dsi@a0352000 {

		compatible = "ste,mcde-dsi";

		reg = <0xa0352000 0x1000>;

		vana-supply = <&ab8500_ldo_ana_reg>;

		clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;

		clock-names = "hs", "lp";

		#address-cells = <1>;

		#size-cells = <0>;

	};

	dsi2: dsi@a0353000 {

		compatible = "ste,mcde-dsi";

		reg = <0xa0353000 0x1000>;

		vana-supply = <&ab8500_ldo_ana_reg>;

		/* This DSI port only has the Low Power / Energy Save clock */

		clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>;

		clock-names = "lp";

		#address-cells = <1>;

		#size-cells = <0>;

	};

};

Documentation/gpu/drm-kms-helpers.rst

+6 −0
Original line number Diff line number Diff line
@@ -107,6 +107,12 @@ fbdev Helper Functions Reference 
.. kernel-doc:: drivers/gpu/drm/drm_fb_helper.c

   :export:



format Helper Functions Reference

=================================



.. kernel-doc:: drivers/gpu/drm/drm_format_helper.c

   :export:



Framebuffer CMA Helper Functions Reference

==========================================

MAINTAINERS

+9 −0
Original line number Diff line number Diff line
@@ -1180,6 +1180,15 @@ F: drivers/gpu/drm/arm/ 
F:	Documentation/devicetree/bindings/display/arm,malidp.txt

F:	Documentation/gpu/afbc.rst



ARM MALI PANFROST DRM DRIVER

M:	Rob Herring <robh@kernel.org>

M:	Tomeu Vizoso <tomeu.vizoso@collabora.com>

L:	dri-devel@lists.freedesktop.org

S:	Supported

T:	git git://anongit.freedesktop.org/drm/drm-misc

F:	drivers/gpu/drm/panfrost/

F:	include/uapi/drm/panfrost_drm.h



ARM MFM AND FLOPPY DRIVERS

M:	Ian Molton <spyro@f2s.com>

S:	Maintained