drivers: soc: qcom: fix incorrect updation of pmu cache flag in CPU_PM_EXIT

rimps_memlat driver will cache PMU counter values when cpu
is going down in hotplug path and also when CPU is entering
lpm. Once the PMU counter values are saved to the shared memory,
cache valid bit is set, and it is cleared when cpu comes back online
or exit from lpm.

RIMPS expects the PMU cache flag to be valid, when cpu is offline
or entered lpm. Observed a race when the hotplug is in progress
and that particular cpu can enter and exit lpm. The current
implementation clears the cache flag during lpm exit without
checking the cpu hotplug status. Once hotplug is complete, core
goes offline and the status flag will remain in incorrect state
indicating cache area is invalid, which will cause RIMPS to read
PMU counter values directly from hardware which will result in APB
read errors.

When hotplug is in progress, do not set status flag to
PMU_CACHE_INVALID in CPU_PM_EXIT path.

Change-Id: I17947ad93eeef99b2148e873dc719622aa372b7c
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>