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Commit 85a64208 authored by Codrin.Ciubotariu@microchip.com's avatar Codrin.Ciubotariu@microchip.com Committed by Greg Kroah-Hartman
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tty/serial: atmel: RS485 & ISO7816: wait for TXRDY before sending data



[ Upstream commit 477b8383100023ea0769979cff67e9be3a720397 ]

At this moment, TXEMPTY is checked before sending data on RS485 and ISO7816
modes. However, TXEMPTY is risen when FIFO (if used) or the Transmit Shift
Register are empty, even though TXRDY might be up and controller is able to
receive data. Since the controller sends data only when TXEMPTY is ready,
on RS485, when DMA is not used, the RTS pin is driven low after each byte.
With this patch, the characters will be transmitted when TXRDY is up and
so, RTS pin will remain high between bytes.
The performance improvement on RS485 is about 8% with a baudrate of 300.

Signed-off-by: default avatarCodrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: default avatarRichard Genoud <richard.genoud@gmail.com>
Link: https://lore.kernel.org/r/20200107111656.26308-1-codrin.ciubotariu@microchip.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Stable-dep-of: 692a8ebcfc24 ("tty: serial: atmel: Preserve previous USART mode if RS485 disabled")
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 9ad48cbf
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