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Commit 811c16a2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mtd/for-5.1' of git://git.infradead.org/linux-mtd 

Pull MTD updates from Boris Brezillon:
 "Core MTD changes:
   - Use struct_size() where appropriate
   - mtd_{read,write}() as wrappers around mtd_{read,write}_oob()
   - Fix misuse of PTR_ERR() in docg3
   - Coding style improvements in mtdcore.c

  SPI NOR changes:
    Core changes:
     - Add support of octal mode I/O transfer
     - Add a bunch of SPI NOR entries to the flash_info table

    SPI NOR controller driver changes:
     - cadence-quadspi:
        * Add support for Octal SPI controller
        * write upto 8-bytes data in STIG mode
     - mtk-quadspi:
        * rename config to a common one
        * add SNOR_HWCAPS_READ to spi_nor_hwcaps mask
     - Add Tudor as SPI-NOR co-maintainer

  NAND changes:
    NAND core changes:
     - Fourth batch of fixes/cleanup to the raw NAND core impacting
       various controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2).
     - Check the return code of nand_reset() and nand_readid_op().
     - Remove ->legacy.erase and single_erase().
     - Simplify the locking.
     - Several implicit fall through annotations.

    Raw NAND controllers drivers changes:
     - Fix various possible object reference leaks (MTK, JZ4780, Atmel)
     - ST:
        * Add support for STM32 FMC2 NAND flash controller
     - Meson:
        * Add support for Amlogic NAND flash controller
     - Denali:
        * Several cleanup patches
     - Sunxi:
        * Several cleanup patches
     - FSMC:
        * Disable NAND on remove()
        * Reset NAND timings on resume()

    SPI-NAND drivers changes:
     - Toshiba:
        * Add support for all Toshiba products.
     - Macronix:
        * Fix ECC status read.
     - Gigadevice:
        * Add support for GD5F1GQ4UExxG"

* tag 'mtd/for-5.1' of git://git.infradead.org/linux-mtd: (64 commits)
  mtd: spi-nor: Fix wrong abbreviation HWCPAS
  mtd: spi-nor: cadence-quadspi: fix spelling mistake: "Couldnt't" -> "Couldn't"
  mtd: spi-nor: Add support for en25qh64
  mtd: spi-nor: Add support for MX25V8035F
  mtd: spi-nor: Add support for EN25Q80A
  mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller
  dt-bindings: cadence-quadspi: Add new compatible for AM654 SoC
  mtd: spi-nor: split s25fl128s into s25fl128s0 and s25fl128s1
  mtd: spi-nor: cadence-quadspi: write upto 8-bytes data in STIG mode
  mtd: spi-nor: Add support for mx25u3235f
  mtd: rawnand: denali_dt: remove single anonymous clock support
  mtd: rawnand: mtk: fix possible object reference leak
  mtd: rawnand: jz4780: fix possible object reference leak
  mtd: rawnand: atmel: fix possible object reference leak
  mtd: rawnand: fsmc: Disable NAND on remove()
  mtd: rawnand: fsmc: Reset NAND timings on resume()
  mtd: spinand: Add support for GigaDevice GD5F1GQ4UExxG
  mtd: rawnand: denali: remove unused dma_addr field from denali_nand_info
  mtd: rawnand: denali: remove unused function argument 'raw'
  mtd: rawnand: denali: remove unneeded denali_reset_irq() call
  ...
parents a83b0423 9220d7be

Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt

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Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs



This file documents the properties in addition to those available in

the MTD NAND bindings.



Required properties:

- compatible : contains one of:

  - "amlogic,meson-gxl-nfc"

  - "amlogic,meson-axg-nfc"

- clocks     :

	A list of phandle + clock-specifier pairs for the clocks listed

	in clock-names.



- clock-names: Should contain the following:

	"core" - NFC module gate clock

	"device" - device clock from eMMC sub clock controller

	"rx" - rx clock phase

	"tx" - tx clock phase



- amlogic,mmc-syscon	: Required for NAND clocks, it's shared with SD/eMMC

				controller port C



Optional children nodes:

Children nodes represent the available nand chips.



Other properties:

see Documentation/devicetree/bindings/mtd/nand.txt for generic bindings.



Example demonstrate on AXG SoC:



	sd_emmc_c_clkc: mmc@7000 {

		compatible = "amlogic,meson-axg-mmc-clkc", "syscon";

		reg = <0x0 0x7000 0x0 0x800>;

	};



	nand-controller@7800 {

		compatible = "amlogic,meson-axg-nfc";

		reg = <0x0 0x7800 0x0 0x100>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;



		clocks = <&clkc CLKID_SD_EMMC_C>,

			<&sd_emmc_c_clkc CLKID_MMC_DIV>,

			<&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,

			<&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;

		clock-names = "core", "device", "rx", "tx";

		amlogic,mmc-syscon = <&sd_emmc_c_clkc>;



		pinctrl-names = "default";

		pinctrl-0 = <&nand_pins>;



		nand@0 {

			reg = <0>;

			#address-cells = <1>;

			#size-cells = <1>;



			nand-on-flash-bbt;

		};

	};

Documentation/devicetree/bindings/mtd/cadence-quadspi.txt

+1 −0
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@@ -4,6 +4,7 @@ Required properties: 
- compatible : should be one of the following:

	Generic default - "cdns,qspi-nor".

	For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".

	For TI AM654 SoC  - "ti,am654-ospi", "cdns,qspi-nor".

- reg : Contains two entries, each of which is a tuple consisting of a

	physical address and length. The first entry is the address and

	length of the controller register set. The second entry is the

Documentation/devicetree/bindings/mtd/mtk-quadspi.txt

+2 −1
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* Serial NOR flash controller for MTK MT81xx (and similar)

* Serial NOR flash controller for MediaTek SoCs



Required properties:

- compatible: 	  For mt8173, compatible should be "mediatek,mt8173-nor",
@@ -10,6 +10,7 @@ Required properties: 
		  "mediatek,mt2712-nor", "mediatek,mt8173-nor"

		  "mediatek,mt7622-nor", "mediatek,mt8173-nor"

		  "mediatek,mt7623-nor", "mediatek,mt8173-nor"

		  "mediatek,mt7629-nor", "mediatek,mt8173-nor"

		  "mediatek,mt8173-nor"

- reg: 		  physical base address and length of the controller's register

- clocks: 	  the phandle of the clocks needed by the nor controller

Documentation/devicetree/bindings/mtd/stm32-fmc2-nand.txt

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STMicroelectronics Flexible Memory Controller 2 (FMC2)

NAND Interface



Required properties:

- compatible: Should be one of:

              * st,stm32mp15-fmc2

- reg: NAND flash controller memory areas.

       First region contains the register location.

       Regions 2 to 4 respectively contain the data, command,

       and address space for CS0.

       Regions 5 to 7 contain the same areas for CS1.

- interrupts: The interrupt number

- pinctrl-0: Standard Pinctrl phandle (see: pinctrl/pinctrl-bindings.txt)

- clocks: The clock needed by the NAND flash controller



Optional properties:

- resets: Reference to a reset controller asserting the FMC controller

- dmas: DMA specifiers (see: dma/stm32-mdma.txt)

- dma-names: Must be "tx", "rx" and "ecc"



* NAND device bindings:



Required properties:

- reg: describes the CS lines assigned to the NAND device.



Optional properties:

- nand-on-flash-bbt: see nand.txt

- nand-ecc-strength: see nand.txt

- nand-ecc-step-size: see nand.txt



The following ECC strength and step size are currently supported:

 - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Hamming)

 - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4)

 - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) (default)



Example:



	fmc: nand-controller@58002000 {

		compatible = "st,stm32mp15-fmc2";

		reg = <0x58002000 0x1000>,

		      <0x80000000 0x1000>,

		      <0x88010000 0x1000>,

		      <0x88020000 0x1000>,

		      <0x81000000 0x1000>,

		      <0x89010000 0x1000>,

		      <0x89020000 0x1000>;

		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&rcc FMC_K>;

		resets = <&rcc FMC_R>;

		pinctrl-names = "default";

		pinctrl-0 = <&fmc_pins_a>;

		#address-cells = <1>;

		#size-cells = <0>;



		nand@0 {

			reg = <0>;

			nand-on-flash-bbt;

			#address-cells = <1>;

			#size-cells = <1>;

		};

	};

MAINTAINERS

+8 −0
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@@ -9866,6 +9866,13 @@ F: drivers/media/platform/meson/ao-cec.c 
F:	Documentation/devicetree/bindings/media/meson-ao-cec.txt

T:	git git://linuxtv.org/media_tree.git



MESON NAND CONTROLLER DRIVER FOR AMLOGIC SOCS

M:	Liang Yang <liang.yang@amlogic.com>

L:	linux-mtd@lists.infradead.org

S:	Maintained

F:	drivers/mtd/nand/raw/meson_*

F:	Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt



MICROBLAZE ARCHITECTURE

M:	Michal Simek <monstr@monstr.eu>

W:	http://www.monstr.eu/fdt/
@@ -14339,6 +14346,7 @@ F: arch/arm/mach-spear/ 


SPI NOR SUBSYSTEM

M:	Marek Vasut <marek.vasut@gmail.com>

M:	Tudor Ambarus <tudor.ambarus@microchip.com>

L:	linux-mtd@lists.infradead.org

W:	http://www.linux-mtd.infradead.org/

Q:	http://patchwork.ozlabs.org/project/linux-mtd/list/