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Commit 7fdda6ba authored by Mayank Rana's avatar Mayank Rana Committed by Gerrit - the friendly Code Review server
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Revert "ARM: dts: msm: Add USB CSR clock entry on Lahaina" 

This reverts commit b92c3f5e.

Change-Id: I51e9650ee26b7a6cdc9ff881174521f5ed246dc4
parent 540e981f

qcom/lahaina-usb.dtsi

+4 −6
Original line number Diff line number Diff line
@@ -29,10 +29,9 @@ 
			<&clock_gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,

			<&clock_gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,

			<&clock_gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,

			<&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>,

			<&clock_gcc GCC_USB30_PRIM_MASTER_CLK__FORCE_MEM_CORE_ON>;

			<&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>;

		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",

				"utmi_clk", "sleep_clk", "core_csr_clk";

					"utmi_clk", "sleep_clk";



		resets = <&clock_gcc GCC_USB30_PRIM_BCR>;

		reset-names = "core_reset";
@@ -365,10 +364,9 @@ 
			<&clock_gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,

			<&clock_gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,

			<&clock_gcc GCC_USB30_SEC_SLEEP_CLK>,

			<&clock_gcc GCC_USB3_SEC_CLKREF_EN>,

			<&clock_gcc GCC_USB30_SEC_MASTER_CLK__FORCE_MEM_CORE_ON>;

			<&clock_gcc GCC_USB3_SEC_CLKREF_EN>;

		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",

			"utmi_clk", "sleep_clk", "xo", "core_csr_clk";

					"utmi_clk", "sleep_clk", "xo";



		resets = <&clock_gcc GCC_USB30_SEC_BCR>;

		reset-names = "core_reset";