Loading drivers/clk/qcom/gdsc-regulator.c +14 −0 Original line number Diff line number Diff line Loading @@ -499,6 +499,20 @@ static int gdsc_set_mode(struct regulator_dev *rdev, unsigned int mode) */ gdsc_mb(sc); udelay(1); /* * While switching from HW to SW mode, HW may be busy * updating internal required signals. Polling for PWR_ON * ensures that the GDSC switches to SW mode before software * starts to use SW mode. */ if (sc->is_gdsc_enabled) { ret = poll_gdsc_status(sc, ENABLED); if (ret) { dev_err(&rdev->dev, "%s enable timed out\n", sc->rdesc.name); goto done; } } sc->is_gdsc_hw_ctrl_mode = false; break; default: Loading Loading
drivers/clk/qcom/gdsc-regulator.c +14 −0 Original line number Diff line number Diff line Loading @@ -499,6 +499,20 @@ static int gdsc_set_mode(struct regulator_dev *rdev, unsigned int mode) */ gdsc_mb(sc); udelay(1); /* * While switching from HW to SW mode, HW may be busy * updating internal required signals. Polling for PWR_ON * ensures that the GDSC switches to SW mode before software * starts to use SW mode. */ if (sc->is_gdsc_enabled) { ret = poll_gdsc_status(sc, ENABLED); if (ret) { dev_err(&rdev->dev, "%s enable timed out\n", sc->rdesc.name); goto done; } } sc->is_gdsc_hw_ctrl_mode = false; break; default: Loading
