Commit 7b83df0d authored Jun 04, 2019 by Rasmus Villemoes Committed by David S. Miller Jun 04, 2019

net: dsa: mv88e6xxx: prepare mv88e6xxx_g1_atu_op() for the mv88e6250



All the currently supported chips have .num_databases either 256 or
4096, so this patch does not change behaviour for any of those. The
mv88e6250, however, has .num_databases == 64, and it does not put the
upper two bits in ATU control 13:12, but rather in ATU Operation
9:8. So change the logic to prepare for supporting mv88e6250.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: David S. Miller <davem@davemloft.net>

parent f30a19b8

drivers/net/dsa/mv88e6xxx/global1_atu.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -94,7 +94,7 @@ static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)
		if (err)
		return err;
		} else {
		if (mv88e6xxx_num_databases(chip) > 16) {
		if (mv88e6xxx_num_databases(chip) > 64) {
		/* ATU DBNum[7:4] are located in ATU Control 15:12 */
		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL,
		&val);
		@@ -106,6 +106,9 @@ static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)
		val);
		if (err)
		return err;
		} else if (mv88e6xxx_num_databases(chip) > 16) {
		/* ATU DBNum[5:4] are located in ATU Operation 9:8 */
		op \|= (fid & 0x30) << 4;
		}

		/* ATU DBNum[3:0] are located in ATU Operation 3:0 */