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Commit f30a19b8 authored by Rasmus Villemoes's avatar Rasmus Villemoes Committed by David S. Miller
Browse files

net: dsa: mv88e6xxx: introduce support for two chips using direct smi addressing 



The 88e6250 (as well as 6220, 6071, 6070, 6020) do not support
multi-chip (indirect) addressing. However, one can still have two of
them on the same mdio bus, since the device only uses 16 of the 32
possible addresses, either addresses 0x00-0x0F or 0x10-0x1F depending
on the ADDR4 pin at reset [since ADDR4 is internally pulled high, the
latter is the default].

In order to prepare for supporting the 88e6250 and friends, introduce
mv88e6xxx_info::dual_chip to allow having a non-zero sw_addr while
still using direct addressing.

Reviewed-by: default avatarVivien Didelot <vivien.didelot@gmail.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarRasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent df63b0d9

drivers/net/dsa/mv88e6xxx/chip.h

+6 −0
Original line number Diff line number Diff line
@@ -112,6 +112,12 @@ struct mv88e6xxx_info { 
	 * when it is non-zero, and use indirect access to internal registers.

	 */

	bool multi_chip;

	/* Dual-chip Addressing Mode

	 * Some chips respond to only half of the 32 SMI addresses,

	 * allowing two to coexist on the same SMI interface.

	 */

	bool dual_chip;



	enum dsa_tag_protocol tag_protocol;



	/* Mask for FromPort and ToPort value of PortVec used in ATU Move

drivers/net/dsa/mv88e6xxx/smi.c

+24 −1
Original line number Diff line number Diff line
@@ -24,6 +24,10 @@ 
 * When ADDR is non-zero, the chip uses Multi-chip Addressing Mode, allowing

 * multiple devices to share the SMI interface. In this mode it responds to only

 * 2 registers, used to indirectly access the internal SMI devices.

 *

 * Some chips use a different scheme: Only the ADDR4 pin is used for

 * configuration, and the device responds to 16 of the 32 SMI

 * addresses, allowing two to coexist on the same SMI interface.

 */



static int mv88e6xxx_smi_direct_read(struct mv88e6xxx_chip *chip,
@@ -76,6 +80,23 @@ static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_direct_ops = { 
	.write = mv88e6xxx_smi_direct_write,

};



static int mv88e6xxx_smi_dual_direct_read(struct mv88e6xxx_chip *chip,

					  int dev, int reg, u16 *data)

{

	return mv88e6xxx_smi_direct_read(chip, chip->sw_addr + dev, reg, data);

}



static int mv88e6xxx_smi_dual_direct_write(struct mv88e6xxx_chip *chip,

					   int dev, int reg, u16 data)

{

	return mv88e6xxx_smi_direct_write(chip, chip->sw_addr + dev, reg, data);

}



static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_dual_direct_ops = {

	.read = mv88e6xxx_smi_dual_direct_read,

	.write = mv88e6xxx_smi_dual_direct_write,

};



/* Offset 0x00: SMI Command Register

 * Offset 0x01: SMI Data Register

 */
@@ -144,7 +165,9 @@ static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_indirect_ops = { 
int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip,

		       struct mii_bus *bus, int sw_addr)

{

	if (sw_addr == 0)

	if (chip->info->dual_chip)

		chip->smi_ops = &mv88e6xxx_smi_dual_direct_ops;

	else if (sw_addr == 0)

		chip->smi_ops = &mv88e6xxx_smi_direct_ops;

	else if (chip->info->multi_chip)

		chip->smi_ops = &mv88e6xxx_smi_indirect_ops;