Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit 7575a745 authored by Arseny Solokha's avatar Arseny Solokha Committed by Wolfram Sang
Browse files

i2c: mpc: fix PORDEVSR2 mask for MPC8533/44



According to the reference manuals for the corresponding SoCs, SEC
frequency ratio configuration is indicated by bit 26 of the POR Device
Status Register 2. Consequently, SEC_CFG bit should be tested by mask 0x20,
not 0x80. Testing the wrong bit leads to selection of wrong I2C clock
prescaler on those SoCs.

Signed-off-by: default avatarArseny Solokha <asolokha@kb.kras.ru>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent f6214f6f
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment