Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 74688a02 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 fixes from Catalin Marinas:
 "The bulk of this is the pte accessors annotation to READ/WRITE_ONCE
  (we tried to avoid pushing this during the merge window to avoid
  conflicts)

   - Updated the page table accessors to use READ/WRITE_ONCE and prevent
     compiler transformation that could lead to an apparent loss of
     coherency

   - Enabled branch predictor hardening for the Falkor CPU

   - Fix interaction between kpti enabling and KASan causing the
     recursive page table walking to take a significant time

   - Fix some sparse warnings"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: cputype: Silence Sparse warnings
  arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables
  arm64: proc: Set PTE_NG for table entries to avoid traversing them twice
  arm64: Add missing Falkor part number for branch predictor hardening
parents f73f047d e1a50de3

arch/arm64/include/asm/cputype.h

+1 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 


#define MPIDR_UP_BITMASK	(0x1 << 30)

#define MPIDR_MT_BITMASK	(0x1 << 24)

#define MPIDR_HWID_BITMASK	0xff00ffffff

#define MPIDR_HWID_BITMASK	0xff00ffffffUL



#define MPIDR_LEVEL_BITS_SHIFT	3

#define MPIDR_LEVEL_BITS	(1 << MPIDR_LEVEL_BITS_SHIFT)

arch/arm64/include/asm/hugetlb.h

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 


static inline pte_t huge_ptep_get(pte_t *ptep)

{

	return *ptep;

	return READ_ONCE(*ptep);

}

arch/arm64/include/asm/kvm_mmu.h

+13 −13
Original line number Diff line number Diff line
@@ -185,42 +185,42 @@ static inline pmd_t kvm_s2pmd_mkexec(pmd_t pmd) 
	return pmd;

}



static inline void kvm_set_s2pte_readonly(pte_t *pte)

static inline void kvm_set_s2pte_readonly(pte_t *ptep)

{

	pteval_t old_pteval, pteval;



	pteval = READ_ONCE(pte_val(*pte));

	pteval = READ_ONCE(pte_val(*ptep));

	do {

		old_pteval = pteval;

		pteval &= ~PTE_S2_RDWR;

		pteval |= PTE_S2_RDONLY;

		pteval = cmpxchg_relaxed(&pte_val(*pte), old_pteval, pteval);

		pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);

	} while (pteval != old_pteval);

}



static inline bool kvm_s2pte_readonly(pte_t *pte)

static inline bool kvm_s2pte_readonly(pte_t *ptep)

{

	return (pte_val(*pte) & PTE_S2_RDWR) == PTE_S2_RDONLY;

	return (READ_ONCE(pte_val(*ptep)) & PTE_S2_RDWR) == PTE_S2_RDONLY;

}



static inline bool kvm_s2pte_exec(pte_t *pte)

static inline bool kvm_s2pte_exec(pte_t *ptep)

{

	return !(pte_val(*pte) & PTE_S2_XN);

	return !(READ_ONCE(pte_val(*ptep)) & PTE_S2_XN);

}



static inline void kvm_set_s2pmd_readonly(pmd_t *pmd)

static inline void kvm_set_s2pmd_readonly(pmd_t *pmdp)

{

	kvm_set_s2pte_readonly((pte_t *)pmd);

	kvm_set_s2pte_readonly((pte_t *)pmdp);

}



static inline bool kvm_s2pmd_readonly(pmd_t *pmd)

static inline bool kvm_s2pmd_readonly(pmd_t *pmdp)

{

	return kvm_s2pte_readonly((pte_t *)pmd);

	return kvm_s2pte_readonly((pte_t *)pmdp);

}



static inline bool kvm_s2pmd_exec(pmd_t *pmd)

static inline bool kvm_s2pmd_exec(pmd_t *pmdp)

{

	return !(pmd_val(*pmd) & PMD_S2_XN);

	return !(READ_ONCE(pmd_val(*pmdp)) & PMD_S2_XN);

}



static inline bool kvm_page_empty(void *ptr)

arch/arm64/include/asm/mmu_context.h

+2 −2
Original line number Diff line number Diff line
@@ -141,13 +141,13 @@ static inline void cpu_install_idmap(void) 
 * Atomically replaces the active TTBR1_EL1 PGD with a new VA-compatible PGD,

 * avoiding the possibility of conflicting TLB entries being allocated.

 */

static inline void cpu_replace_ttbr1(pgd_t *pgd)

static inline void cpu_replace_ttbr1(pgd_t *pgdp)

{

	typedef void (ttbr_replace_func)(phys_addr_t);

	extern ttbr_replace_func idmap_cpu_replace_ttbr1;

	ttbr_replace_func *replace_phys;



	phys_addr_t pgd_phys = virt_to_phys(pgd);

	phys_addr_t pgd_phys = virt_to_phys(pgdp);



	replace_phys = (void *)__pa_symbol(idmap_cpu_replace_ttbr1);

arch/arm64/include/asm/pgalloc.h

+22 −22
Original line number Diff line number Diff line
@@ -36,23 +36,23 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) 
	return (pmd_t *)__get_free_page(PGALLOC_GFP);

}



static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)

static inline void pmd_free(struct mm_struct *mm, pmd_t *pmdp)

{

	BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));

	free_page((unsigned long)pmd);

	BUG_ON((unsigned long)pmdp & (PAGE_SIZE-1));

	free_page((unsigned long)pmdp);

}



static inline void __pud_populate(pud_t *pud, phys_addr_t pmd, pudval_t prot)

static inline void __pud_populate(pud_t *pudp, phys_addr_t pmdp, pudval_t prot)

{

	set_pud(pud, __pud(__phys_to_pud_val(pmd) | prot));

	set_pud(pudp, __pud(__phys_to_pud_val(pmdp) | prot));

}



static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)

static inline void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmdp)

{

	__pud_populate(pud, __pa(pmd), PMD_TYPE_TABLE);

	__pud_populate(pudp, __pa(pmdp), PMD_TYPE_TABLE);

}

#else

static inline void __pud_populate(pud_t *pud, phys_addr_t pmd, pudval_t prot)

static inline void __pud_populate(pud_t *pudp, phys_addr_t pmdp, pudval_t prot)

{

	BUILD_BUG();

}
@@ -65,30 +65,30 @@ static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr) 
	return (pud_t *)__get_free_page(PGALLOC_GFP);

}



static inline void pud_free(struct mm_struct *mm, pud_t *pud)

static inline void pud_free(struct mm_struct *mm, pud_t *pudp)

{

	BUG_ON((unsigned long)pud & (PAGE_SIZE-1));

	free_page((unsigned long)pud);

	BUG_ON((unsigned long)pudp & (PAGE_SIZE-1));

	free_page((unsigned long)pudp);

}



static inline void __pgd_populate(pgd_t *pgdp, phys_addr_t pud, pgdval_t prot)

static inline void __pgd_populate(pgd_t *pgdp, phys_addr_t pudp, pgdval_t prot)

{

	set_pgd(pgdp, __pgd(__phys_to_pgd_val(pud) | prot));

	set_pgd(pgdp, __pgd(__phys_to_pgd_val(pudp) | prot));

}



static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud)

static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgdp, pud_t *pudp)

{

	__pgd_populate(pgd, __pa(pud), PUD_TYPE_TABLE);

	__pgd_populate(pgdp, __pa(pudp), PUD_TYPE_TABLE);

}

#else

static inline void __pgd_populate(pgd_t *pgdp, phys_addr_t pud, pgdval_t prot)

static inline void __pgd_populate(pgd_t *pgdp, phys_addr_t pudp, pgdval_t prot)

{

	BUILD_BUG();

}

#endif	/* CONFIG_PGTABLE_LEVELS > 3 */



extern pgd_t *pgd_alloc(struct mm_struct *mm);

extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);

extern void pgd_free(struct mm_struct *mm, pgd_t *pgdp);



static inline pte_t *

pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
@@ -114,10 +114,10 @@ pte_alloc_one(struct mm_struct *mm, unsigned long addr) 
/*

 * Free a PTE table.

 */

static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)

static inline void pte_free_kernel(struct mm_struct *mm, pte_t *ptep)

{

	if (pte)

		free_page((unsigned long)pte);

	if (ptep)

		free_page((unsigned long)ptep);

}



static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
@@ -126,10 +126,10 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t pte) 
	__free_page(pte);

}



static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte,

static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t ptep,

				  pmdval_t prot)

{

	set_pmd(pmdp, __pmd(__phys_to_pmd_val(pte) | prot));

	set_pmd(pmdp, __pmd(__phys_to_pmd_val(ptep) | prot));

}



/*