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Commit 71c70eb2 authored by Huy Nguyen's avatar Huy Nguyen Committed by Saeed Mahameed
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net/mlx5: Add MLX5_SET16 and MLX5_GET16 



Add MLX5_SET16 and MLX5_GET16 for 16bit structure field in firmware
command.

Signed-off-by: default avatarHuy Nguyen <huyn@mellanox.com>
Reviewed-by: default avatarParav Pandit <parav@mellanox.com>
Reviewed-by: default avatarEli Cohen <eli@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent c02762eb

include/linux/mlx5/device.h

+17 −0
Original line number Diff line number Diff line
@@ -49,11 +49,15 @@ 
#define __mlx5_nullp(typ) ((struct mlx5_ifc_##typ##_bits *)0)

#define __mlx5_bit_sz(typ, fld) sizeof(__mlx5_nullp(typ)->fld)

#define __mlx5_bit_off(typ, fld) (offsetof(struct mlx5_ifc_##typ##_bits, fld))

#define __mlx5_16_off(typ, fld) (__mlx5_bit_off(typ, fld) / 16)

#define __mlx5_dw_off(typ, fld) (__mlx5_bit_off(typ, fld) / 32)

#define __mlx5_64_off(typ, fld) (__mlx5_bit_off(typ, fld) / 64)

#define __mlx5_16_bit_off(typ, fld) (16 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0xf))

#define __mlx5_dw_bit_off(typ, fld) (32 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0x1f))

#define __mlx5_mask(typ, fld) ((u32)((1ull << __mlx5_bit_sz(typ, fld)) - 1))

#define __mlx5_dw_mask(typ, fld) (__mlx5_mask(typ, fld) << __mlx5_dw_bit_off(typ, fld))

#define __mlx5_mask16(typ, fld) ((u16)((1ull << __mlx5_bit_sz(typ, fld)) - 1))

#define __mlx5_16_mask(typ, fld) (__mlx5_mask16(typ, fld) << __mlx5_16_bit_off(typ, fld))

#define __mlx5_st_sz_bits(typ) sizeof(struct mlx5_ifc_##typ##_bits)



#define MLX5_FLD_SZ_BYTES(typ, fld) (__mlx5_bit_sz(typ, fld) / 8)
@@ -116,6 +120,19 @@ __mlx5_mask(typ, fld)) 
	___t; \

})



#define MLX5_GET16(typ, p, fld) ((be16_to_cpu(*((__be16 *)(p) +\

__mlx5_16_off(typ, fld))) >> __mlx5_16_bit_off(typ, fld)) & \

__mlx5_mask16(typ, fld))



#define MLX5_SET16(typ, p, fld, v) do { \

	u16 _v = v; \

	BUILD_BUG_ON(__mlx5_st_sz_bits(typ) % 16);             \

	*((__be16 *)(p) + __mlx5_16_off(typ, fld)) = \

	cpu_to_be16((be16_to_cpu(*((__be16 *)(p) + __mlx5_16_off(typ, fld))) & \

		     (~__mlx5_16_mask(typ, fld))) | (((_v) & __mlx5_mask16(typ, fld)) \

		     << __mlx5_16_bit_off(typ, fld))); \

} while (0)



/* Big endian getters */

#define MLX5_GET64_BE(typ, p, fld) (*((__be64 *)(p) +\

	__mlx5_64_off(typ, fld)))