ARM: dts: qcom: Enable PCIe halt feature on sdxlemur

In sdxlemur, with PCIe halt feature disable, IPA has raised 
some SMMU errors due to out of order of transactions.

So, enabled the PCIe halt feature to default, which is
PCIe write halt enable with 1MB and enable PCIe read halt.

Change-Id: I660b6bc16db3af05bdedc67ea28c92ee769166db