Merge "disp: msm: dsi: register io resource collection VM event hook" (6fd5a637) · Commits · e / devices / android_kernel_fairphone_FP5

msm/dsi/dsi_catalog.c

+3 −3

Original line number	Diff line number	Diff line
		@@ -102,11 +102,11 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl,
		case DSI_CTRL_VERSION_2_5:
		ctrl->ops.phy_reset_config = dsi_ctrl_hw_22_phy_reset_config;
		ctrl->ops.config_clk_gating = dsi_ctrl_hw_22_config_clk_gating;
		ctrl->ops.setup_lane_map = dsi_ctrl_hw_20_setup_lane_map;
		ctrl->ops.setup_lane_map = dsi_ctrl_hw_22_setup_lane_map;
		ctrl->ops.wait_for_lane_idle =
		dsi_ctrl_hw_20_wait_for_lane_idle;
		dsi_ctrl_hw_22_wait_for_lane_idle;
		ctrl->ops.reg_dump_to_buffer =
		dsi_ctrl_hw_20_reg_dump_to_buffer;
		dsi_ctrl_hw_22_reg_dump_to_buffer;
		ctrl->ops.ulps_ops.ulps_request = dsi_ctrl_hw_cmn_ulps_request;
		ctrl->ops.ulps_ops.ulps_exit = dsi_ctrl_hw_cmn_ulps_exit;
		ctrl->ops.ulps_ops.get_lanes_in_ulps =

msm/dsi/dsi_catalog.h

+6 −0

Original line number	Diff line number	Diff line
		@@ -243,6 +243,12 @@ void dsi_ctrl_hw_kickoff_non_embedded_mode(struct dsi_ctrl_hw *ctrl,
		u32 flags);

		/* Definitions specific to 2.2 DSI controller hardware */
		void dsi_ctrl_hw_22_setup_lane_map(struct dsi_ctrl_hw *ctrl,
		struct dsi_lane_map *lane_map);
		int dsi_ctrl_hw_22_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl, u32 lanes);
		ssize_t dsi_ctrl_hw_22_reg_dump_to_buffer(struct dsi_ctrl_hw *ctrl,
		char *buf, u32 size);

		void dsi_ctrl_hw_22_config_clk_gating(struct dsi_ctrl_hw *ctrl, bool enable,
		enum dsi_clk_gate_type clk_selection);

msm/dsi/dsi_ctrl.c

+63 −61

Original line number	Diff line number	Diff line
		@@ -1998,6 +1998,27 @@ static struct platform_driver dsi_ctrl_driver = {
		},
		};

		int dsi_ctrl_get_io_resources(struct msm_io_res *io_res)
		{
		int rc = 0;
		struct dsi_ctrl_list_item *dsi_ctrl;

		mutex_lock(&dsi_ctrl_list_lock);

		list_for_each_entry(dsi_ctrl, &dsi_ctrl_list, list) {
		rc = msm_dss_get_io_mem(dsi_ctrl->ctrl->pdev, &io_res->mem);
		if (rc) {
		DSI_CTRL_ERR(dsi_ctrl->ctrl,
		"failed to get io mem, rc = %d\n", rc);
		return rc;
		}
		}

		mutex_unlock(&dsi_ctrl_list_lock);

		return rc;
		}

		/**
		* dsi_ctrl_get() - get a dsi_ctrl handle from an of_node
		* @of_node: of_node of the DSI controller.
		@@ -2792,7 +2813,8 @@ int dsi_ctrl_update_host_state(struct dsi_ctrl *dsi_ctrl,
		/**
		* dsi_ctrl_host_init() - Initialize DSI host hardware.
		* @dsi_ctrl: DSI controller handle.
		* @is_splash_enabled: boolean signifying splash status.
		* @skip_op: Boolean to indicate few operations can be skipped.
		* Set during the cont-splash or trusted-vm enable case.
		*
		* Initializes DSI controller hardware with host configuration provided by
		* dsi_ctrl_update_host_config(). Initialization can be performed only during
		@@ -2801,7 +2823,7 @@ int dsi_ctrl_update_host_state(struct dsi_ctrl *dsi_ctrl,
		*
		* Return: error code.
		*/
		int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled)
		int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool skip_op)
		{
		int rc = 0;

		@@ -2818,10 +2840,11 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled)
		goto error;
		}

		/* For Splash usecases we omit hw operations as bootloader
		* already takes care of them
		/*
		* For continuous splash/trusted vm usecases we omit hw operations
		* as bootloader/primary vm takes care of them respectively
		*/
		if (!is_splash_enabled) {
		if (!skip_op) {
		dsi_ctrl->hw.ops.setup_lane_map(&dsi_ctrl->hw,
		&dsi_ctrl->host_config.lane_map);

		@@ -2850,8 +2873,8 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled)
		dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0);
		dsi_ctrl_enable_error_interrupts(dsi_ctrl);

		DSI_CTRL_DEBUG(dsi_ctrl, "Host initialization complete, continuous splash status:%d\n",
		is_splash_enabled);
		DSI_CTRL_DEBUG(dsi_ctrl, "Host initialization complete, skip op: %d\n",
		skip_op);
		dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, 0x1);
		error:
		mutex_unlock(&dsi_ctrl->ctrl_lock);
		@@ -3249,42 +3272,6 @@ int dsi_ctrl_get_host_engine_init_state(struct dsi_ctrl *dsi_ctrl,
		return 0;
		}

		/**
		* dsi_ctrl_update_host_engine_state_for_cont_splash() -
		* set engine state for dsi controller during continuous splash
		* @dsi_ctrl: DSI controller handle.
		* @state: Engine state.
		*
		* Set host engine state for DSI controller during continuous splash.
		*
		* Return: error code.
		*/
		int dsi_ctrl_update_host_engine_state_for_cont_splash(struct dsi_ctrl *dsi_ctrl,
		enum dsi_engine_state state)
		{
		int rc = 0;

		if (!dsi_ctrl \|\| (state >= DSI_CTRL_ENGINE_MAX)) {
		DSI_CTRL_ERR(dsi_ctrl, "Invalid params\n");
		return -EINVAL;
		}

		mutex_lock(&dsi_ctrl->ctrl_lock);

		rc = dsi_ctrl_check_state(dsi_ctrl, DSI_CTRL_OP_HOST_ENGINE, state);
		if (rc) {
		DSI_CTRL_ERR(dsi_ctrl, "Controller state check failed, rc=%d\n",
		rc);
		goto error;
		}

		DSI_CTRL_DEBUG(dsi_ctrl, "Set host engine state = %d\n", state);
		dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_ENGINE, state);
		error:
		mutex_unlock(&dsi_ctrl->ctrl_lock);
		return rc;
		}

		/**
		* dsi_ctrl_set_power_state() - set power state for dsi controller
		* @dsi_ctrl: DSI controller handle.
		@@ -3392,6 +3379,8 @@ int dsi_ctrl_set_tpg_state(struct dsi_ctrl *dsi_ctrl, bool on)
		* dsi_ctrl_set_host_engine_state() - set host engine state
		* @dsi_ctrl: DSI Controller handle.
		* @state: Engine state.
		* @skip_op: Boolean to indicate few operations can be skipped.
		* Set during the cont-splash or trusted-vm enable case.
		*
		* Host engine state can be modified only when DSI controller power state is
		* set to DSI_CTRL_POWER_LINK_CLK_ON and cmd, video engines are disabled.
		@@ -3399,7 +3388,7 @@ int dsi_ctrl_set_tpg_state(struct dsi_ctrl *dsi_ctrl, bool on)
		* Return: error code.
		*/
		int dsi_ctrl_set_host_engine_state(struct dsi_ctrl *dsi_ctrl,
		enum dsi_engine_state state)
		enum dsi_engine_state state, bool skip_op)
		{
		int rc = 0;

		@@ -3417,10 +3406,12 @@ int dsi_ctrl_set_host_engine_state(struct dsi_ctrl *dsi_ctrl,
		goto error;
		}

		if (!skip_op) {
		if (state == DSI_CTRL_ENGINE_ON)
		dsi_ctrl->hw.ops.ctrl_en(&dsi_ctrl->hw, true);
		else
		dsi_ctrl->hw.ops.ctrl_en(&dsi_ctrl->hw, false);
		}

		DSI_CTRL_DEBUG(dsi_ctrl, "Set host engine state = %d\n", state);
		dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_ENGINE, state);
		@@ -3433,6 +3424,8 @@ int dsi_ctrl_set_host_engine_state(struct dsi_ctrl *dsi_ctrl,
		* dsi_ctrl_set_cmd_engine_state() - set command engine state
		* @dsi_ctrl: DSI Controller handle.
		* @state: Engine state.
		* @skip_op: Boolean to indicate few operations can be skipped.
		* Set during the cont-splash or trusted-vm enable case.
		*
		* Command engine state can be modified only when DSI controller power state is
		* set to DSI_CTRL_POWER_LINK_CLK_ON.
		@@ -3440,7 +3433,7 @@ int dsi_ctrl_set_host_engine_state(struct dsi_ctrl *dsi_ctrl,
		* Return: error code.
		*/
		int dsi_ctrl_set_cmd_engine_state(struct dsi_ctrl *dsi_ctrl,
		enum dsi_engine_state state)
		enum dsi_engine_state state, bool skip_op)
		{
		int rc = 0;

		@@ -3456,12 +3449,15 @@ int dsi_ctrl_set_cmd_engine_state(struct dsi_ctrl *dsi_ctrl,
		goto error;
		}

		if (!skip_op) {
		if (state == DSI_CTRL_ENGINE_ON)
		dsi_ctrl->hw.ops.cmd_engine_en(&dsi_ctrl->hw, true);
		else
		dsi_ctrl->hw.ops.cmd_engine_en(&dsi_ctrl->hw, false);
		}

		DSI_CTRL_DEBUG(dsi_ctrl, "Set cmd engine state = %d\n", state);
		DSI_CTRL_DEBUG(dsi_ctrl, "Set cmd engine state:%d, skip_op:%d\n",
		state, skip_op);
		dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_CMD_ENGINE, state);
		error:
		return rc;
		@@ -3471,6 +3467,8 @@ int dsi_ctrl_set_cmd_engine_state(struct dsi_ctrl *dsi_ctrl,
		* dsi_ctrl_set_vid_engine_state() - set video engine state
		* @dsi_ctrl: DSI Controller handle.
		* @state: Engine state.
		* @skip_op: Boolean to indicate few operations can be skipped.
		* Set during the cont-splash or trusted-vm enable case.
		*
		* Video engine state can be modified only when DSI controller power state is
		* set to DSI_CTRL_POWER_LINK_CLK_ON.
		@@ -3478,7 +3476,7 @@ int dsi_ctrl_set_cmd_engine_state(struct dsi_ctrl *dsi_ctrl,
		* Return: error code.
		*/
		int dsi_ctrl_set_vid_engine_state(struct dsi_ctrl *dsi_ctrl,
		enum dsi_engine_state state)
		enum dsi_engine_state state, bool skip_op)
		{
		int rc = 0;
		bool on;
		@@ -3497,14 +3495,18 @@ int dsi_ctrl_set_vid_engine_state(struct dsi_ctrl *dsi_ctrl,
		goto error;
		}


		if (!skip_op) {
		on = (state == DSI_CTRL_ENGINE_ON) ? true : false;
		dsi_ctrl->hw.ops.video_engine_en(&dsi_ctrl->hw, on);

		/* perform a reset when turning off video engine */
		if (!on)
		dsi_ctrl->hw.ops.soft_reset(&dsi_ctrl->hw);
		}

		DSI_CTRL_DEBUG(dsi_ctrl, "Set video engine state = %d\n", state);
		DSI_CTRL_DEBUG(dsi_ctrl, "Set video engine state:%d, skip_op:%d\n",
		state, skip_op);
		dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_VID_ENGINE, state);
		error:
		mutex_unlock(&dsi_ctrl->ctrl_lock);

msm/dsi/dsi_ctrl.h

+22 −16

Original line number	Diff line number	Diff line
		@@ -455,7 +455,8 @@ int dsi_ctrl_host_timing_update(struct dsi_ctrl *dsi_ctrl);
		/**
		* dsi_ctrl_host_init() - Initialize DSI host hardware.
		* @dsi_ctrl: DSI controller handle.
		* @is_splash_enabled: boolean signifying splash status.
		* @skip_op: Boolean to indicate few operations can be skipped.
		* Set during the cont-splash or trusted-vm enable case.
		*
		* Initializes DSI controller hardware with host configuration provided by
		* dsi_ctrl_update_host_config(). Initialization can be performed only during
		@@ -464,7 +465,7 @@ int dsi_ctrl_host_timing_update(struct dsi_ctrl *dsi_ctrl);
		*
		* Return: error code.
		*/
		int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled);
		int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool skip_op);

		/**
		* dsi_ctrl_host_deinit() - De-Initialize DSI host hardware.
		@@ -565,17 +566,6 @@ int dsi_ctrl_cmd_transfer(struct dsi_ctrl *dsi_ctrl,
		*/
		int dsi_ctrl_cmd_tx_trigger(struct dsi_ctrl *dsi_ctrl, u32 flags);

		/**
		* dsi_ctrl_update_host_engine_state_for_cont_splash() - update engine
		* states for cont splash usecase
		* @dsi_ctrl: DSI controller handle.
		* @state: DSI engine state
		*
		* Return: error code.
		*/
		int dsi_ctrl_update_host_engine_state_for_cont_splash(struct dsi_ctrl *dsi_ctrl,
		enum dsi_engine_state state);

		/**
		* dsi_ctrl_set_power_state() - set power state for dsi controller
		* @dsi_ctrl: DSI controller handle.
		@@ -593,6 +583,8 @@ int dsi_ctrl_set_power_state(struct dsi_ctrl *dsi_ctrl,
		* dsi_ctrl_set_cmd_engine_state() - set command engine state
		* @dsi_ctrl: DSI Controller handle.
		* @state: Engine state.
		* @skip_op: Boolean to indicate few operations can be skipped.
		* Set during the cont-splash or trusted-vm enable case.
		*
		* Command engine state can be modified only when DSI controller power state is
		* set to DSI_CTRL_POWER_LINK_CLK_ON.
		@@ -600,7 +592,7 @@ int dsi_ctrl_set_power_state(struct dsi_ctrl *dsi_ctrl,
		* Return: error code.
		*/
		int dsi_ctrl_set_cmd_engine_state(struct dsi_ctrl *dsi_ctrl,
		enum dsi_engine_state state);
		enum dsi_engine_state state, bool skip_op);

		/**
		* dsi_ctrl_validate_host_state() - validate DSI ctrl host state
		@@ -616,6 +608,8 @@ bool dsi_ctrl_validate_host_state(struct dsi_ctrl *dsi_ctrl);
		* dsi_ctrl_set_vid_engine_state() - set video engine state
		* @dsi_ctrl: DSI Controller handle.
		* @state: Engine state.
		* @skip_op: Boolean to indicate few operations can be skipped.
		* Set during the cont-splash or trusted-vm enable case.
		*
		* Video engine state can be modified only when DSI controller power state is
		* set to DSI_CTRL_POWER_LINK_CLK_ON.
		@@ -623,12 +617,14 @@ bool dsi_ctrl_validate_host_state(struct dsi_ctrl *dsi_ctrl);
		* Return: error code.
		*/
		int dsi_ctrl_set_vid_engine_state(struct dsi_ctrl *dsi_ctrl,
		enum dsi_engine_state state);
		enum dsi_engine_state state, bool skip_op);

		/**
		* dsi_ctrl_set_host_engine_state() - set host engine state
		* @dsi_ctrl: DSI Controller handle.
		* @state: Engine state.
		* @skip_op: Boolean to indicate few operations can be skipped.
		* Set during the cont-splash or trusted-vm enable case.
		*
		* Host engine state can be modified only when DSI controller power state is
		* set to DSI_CTRL_POWER_LINK_CLK_ON and cmd, video engines are disabled.
		@@ -636,7 +632,7 @@ int dsi_ctrl_set_vid_engine_state(struct dsi_ctrl *dsi_ctrl,
		* Return: error code.
		*/
		int dsi_ctrl_set_host_engine_state(struct dsi_ctrl *dsi_ctrl,
		enum dsi_engine_state state);
		enum dsi_engine_state state, bool skip_op);

		/**
		* dsi_ctrl_set_ulps() - set ULPS state for DSI lanes.
		@@ -851,4 +847,14 @@ void dsi_ctrl_set_continuous_clk(struct dsi_ctrl *dsi_ctrl, bool enable);
		* @dsi_ctrl: DSI controller handle.
		*/
		int dsi_ctrl_wait4dynamic_refresh_done(struct dsi_ctrl *ctrl);

		/**
		* dsi_ctrl_get_io_resources() - reads associated register range
		*
		* @io_res: pointer to msm_io_res struct to populate the ranges
		*
		* Return: error code.
		*/
		int dsi_ctrl_get_io_resources(struct msm_io_res *io_res);

		#endif /* _DSI_CTRL_H_ */

msm/dsi/dsi_ctrl_hw_2_2.c

+57 −2

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
		* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
		*/

		#include <linux/iopoll.h>
		#include "dsi_ctrl_hw.h"
		#include "dsi_ctrl_reg.h"
		#include "dsi_hw.h"
		@@ -13,6 +13,61 @@
		/* register to configure DMA scheduling */
		#define DSI_DMA_SCHEDULE_CTRL 0x100

		void dsi_ctrl_hw_22_setup_lane_map(struct dsi_ctrl_hw *ctrl,
		struct dsi_lane_map *lane_map)
		{
		u32 reg_value = lane_map->lane_map_v2[DSI_LOGICAL_LANE_0] \|
		(lane_map->lane_map_v2[DSI_LOGICAL_LANE_1] << 4) \|
		(lane_map->lane_map_v2[DSI_LOGICAL_LANE_2] << 8) \|
		(lane_map->lane_map_v2[DSI_LOGICAL_LANE_3] << 12);

		DSI_W32(ctrl, DSI_LANE_SWAP_CTRL, reg_value);

		DSI_CTRL_HW_DBG(ctrl, "[DSI_%d] Lane swap setup complete\n",
		ctrl->index);
		}

		int dsi_ctrl_hw_22_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl,
		u32 lanes)
		{
		int rc = 0, val = 0;
		u32 fifo_empty_mask = 0;
		u32 const sleep_us = 10;
		u32 const timeout_us = 100;

		if (lanes & DSI_DATA_LANE_0)
		fifo_empty_mask \|= (BIT(12) \| BIT(16));

		if (lanes & DSI_DATA_LANE_1)
		fifo_empty_mask \|= BIT(20);

		if (lanes & DSI_DATA_LANE_2)
		fifo_empty_mask \|= BIT(24);

		if (lanes & DSI_DATA_LANE_3)
		fifo_empty_mask \|= BIT(28);

		DSI_CTRL_HW_DBG(ctrl, "%s: polling for fifo empty, mask=0x%08x\n",
		__func__, fifo_empty_mask);
		rc = readl_poll_timeout(ctrl->base + DSI_FIFO_STATUS, val,
		(val & fifo_empty_mask), sleep_us, timeout_us);
		if (rc) {
		DSI_CTRL_HW_ERR(ctrl,
		"%s: fifo not empty, FIFO_STATUS=0x%08x\n",
		__func__, val);
		goto error;
		}
		error:
		return rc;
		}

		ssize_t dsi_ctrl_hw_22_reg_dump_to_buffer(struct dsi_ctrl_hw *ctrl,
		char *buf,
		u32 size)
		{
		return size;
		}

		/**
		* dsi_ctrl_hw_22_phy_reset_config() - to configure clamp control during ulps
		* @ctrl: Pointer to the controller host hardware.