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Commit 6ec69969 authored by Yujun Zhang's avatar Yujun Zhang
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disp: pll: add support for 7nm DSI PLL shadow clock



Add support for 7nm DSI PLL shadow clocks, which will be
used during dynamic dsi clock switch and dfps feature.

Change-Id: I870f961c7af4d404e61b45a4ad860ffb0e71ae7c
Signed-off-by: default avatarSandeep Panda <spanda@codeaurora.org>
Signed-off-by: default avatarYujun Zhang <yujunzhang@codeaurora.org>
Signed-off-by: default avatarRay Zhang <rayz@codeaurora.org>
parent 01c0dad6
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