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Commit 6eb9d603 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
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drm/amd/pp: Memory Latency is always 25us on Vega10



For HBM, 25us latency is enough for memory clock switch.

Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 23ec3d14
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