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Commit 69baed9a authored by Santosh Mardi's avatar Santosh Mardi Committed by Gerrit - the friendly Code Review server
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drivers: soc: qcom: rimps_memlat: update error checks 



set_event will return NULL if event_id is not valid, the
caller is proceeding further without proper check for NULL.
Update pmu event setup function to check pevent for NULL.

From the RIMPS perspective, pmu counter IDs 0 and 1 correspond
to 64bit cycle counter with ID 0 representing low 32 bit and
ID 1 representing high 32bit, while the counter IDs from 2 to 7
correspond to remaining PMUs. At the time of storing pmu counter
values to RIMPS shared memory, the function store_event_val()
stores both low and high 32bit values of cycle counter when ID 0 is
passed as argument to pmu index, hence no need to handle ID 1
separately. Update logic accordingly to drop check for ID 1.

Change-Id: Idd345c825572710753f18306f565043347921216
Signed-off-by: default avatarSantosh Mardi <gsantosh@codeaurora.org>
parent dd05986c

drivers/soc/qcom/rimps_memlat.c

+17 −9
Original line number Diff line number Diff line
@@ -481,10 +481,14 @@ static struct perf_event *set_event(int event_id, unsigned int cpu, 
static int setup_common_pmu_events(struct memlat_cpu_grp *cpu_grp,

				cpumask_t *mask, bool cpu_online)

{

	struct perf_event_attr *attr = alloc_attr();

	struct perf_event_attr *attr;

	struct perf_event *pevent;

	unsigned int cpu;



	attr = alloc_attr();

	if (!attr)

		return -ENODEV;



	for_each_cpu(cpu, mask) {

		struct pmu_map *pmu = to_common_pmu_map(cpu_grp, cpu);

		struct cpu_data *cpus_data = to_cpu_data(cpu_grp, cpu);
@@ -494,7 +498,7 @@ static int setup_common_pmu_events(struct memlat_cpu_grp *cpu_grp, 


		pevent = set_event(cpu_grp->common_ev_ids[INST_IDX],

						cpu, attr);

		if (IS_ERR(pevent))

		if (!pevent || IS_ERR(pevent))

			return -ENODEV;



		cpus_data->common_evs[INST_IDX] = pevent;
@@ -502,7 +506,7 @@ static int setup_common_pmu_events(struct memlat_cpu_grp *cpu_grp, 
		pmu[INST_IDX].hw_cntr_idx = pevent->hw.idx + 1;



		pevent = set_event(cpu_grp->common_ev_ids[CYC_IDX], cpu, attr);

		if (IS_ERR(pevent)) {

		if (!pevent || IS_ERR(pevent)) {

			perf_event_release_kernel(

					cpus_data->common_evs[INST_IDX]);

			return -ENODEV;
@@ -514,7 +518,7 @@ static int setup_common_pmu_events(struct memlat_cpu_grp *cpu_grp, 


		if (cpu_grp->common_ev_ids[STALL_IDX] != INVALID_PMU_EVENT_ID) {

			pevent = set_event(cpu_grp->common_ev_ids[STALL_IDX], cpu, attr);

			if (IS_ERR(pevent)) {

			if (!pevent || IS_ERR(pevent)) {

				perf_event_release_kernel(

					cpus_data->common_evs[INST_IDX]);

				perf_event_release_kernel(
@@ -536,10 +540,14 @@ static int setup_common_pmu_events(struct memlat_cpu_grp *cpu_grp, 
static int setup_mon_pmu_events(struct memlat_mon *mon,

					cpumask_t *mask, bool cpu_online)

{

	struct perf_event_attr *attr = alloc_attr();

	struct perf_event_attr *attr;

	struct perf_event *pevent;

	unsigned int cpu;



	attr = alloc_attr();

	if (!attr)

		return -ENODEV;



	for_each_cpu(cpu, mask) {

		struct pmu_map *pmu = to_mon_pmu_map(mon, cpu);

		struct mon_data *ev_data = to_mon_ev_data(mon, cpu);
@@ -548,7 +556,7 @@ static int setup_mon_pmu_events(struct memlat_mon *mon, 
			continue;



		pevent = set_event(mon->mon_ev_ids[MISS_IDX], cpu, attr);

		if (IS_ERR(pevent))

		if (!pevent || IS_ERR(pevent))

			return -ENODEV;



		ev_data->mon_evs[MISS_IDX] = pevent;
@@ -558,7 +566,7 @@ static int setup_mon_pmu_events(struct memlat_mon *mon, 
		if (mon->mon_ev_ids[L2WB_IDX] != INVALID_PMU_EVENT_ID) {

			pevent = set_event(mon->mon_ev_ids[L2WB_IDX],

						cpu, attr);

			if (IS_ERR(pevent)) {

			if (!pevent || IS_ERR(pevent)) {

				perf_event_release_kernel(

					ev_data->mon_evs[MISS_IDX]);

				return -ENODEV;
@@ -576,7 +584,7 @@ static int setup_mon_pmu_events(struct memlat_mon *mon, 


			pevent = set_event(mon->mon_ev_ids[L3_ACCESS_IDX],

						cpu, attr);

			if (IS_ERR(pevent)) {

			if (!pevent || IS_ERR(pevent)) {

				perf_event_release_kernel(

					ev_data->mon_evs[MISS_IDX]);

				if (ev_data->mon_evs[L2WB_IDX])
@@ -605,7 +613,7 @@ static inline void store_event_val(u64 val, u8 idx, u8 cpu) 
	if (idx == 0) {

		writel_relaxed((val & (0xFFFFFFFF)), &base->ccntr_lo);

		writel_relaxed(((val >> 32) & (0xFFFFFFFF)), &base->ccntr_hi);

	} else if (idx < MAX_PMU_CNTRS_RIMPS) {

	} else if ((idx > 1) && (idx < MAX_PMU_CNTRS_RIMPS)) {

		writel_relaxed((val & (0xFFFFFFFF)), &base->evcntr[idx - 2]);

	}

}