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Commit 64ee2c4d authored by Abhinav Kumar's avatar Abhinav Kumar Committed by Gerrit - the friendly Code Review server
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disp: msm: dsi: add generic API for calculating horizontal timings 



Add a generic API which calculates the horizontal timings based
on the compression type in case compression is enabled and even
for non-compression cases.

Replace the usage of the DSC macros with this generic API.

Change-Id: Ie9174c20adc51a0be7c9127529d41faa4b473b55
Signed-off-by: default avatarAbhinav Kumar <abhinavk@codeaurora.org>
parent c4f5050e

msm/dsi/dsi_ctrl.c

+1 −1
Original line number Diff line number Diff line
@@ -913,7 +913,7 @@ static int dsi_ctrl_update_link_freqs(struct dsi_ctrl *dsi_ctrl, 
		do_div(bit_rate, dsi_transfer_time_us);

		bit_rate = bit_rate * num_of_lanes;

	} else {

		h_period = DSI_H_TOTAL_DSC(timing);

		h_period = dsi_h_total_dce(timing);

		v_period = DSI_V_TOTAL(timing);

		bit_rate = h_period * v_period * timing->refresh_rate * bpp;

	}

msm/dsi/dsi_defs.h

+21 −23
Original line number Diff line number Diff line
@@ -16,29 +16,6 @@ 
#define DSI_V_TOTAL(t) (((t)->v_active) + ((t)->v_back_porch) + \

			((t)->v_sync_width) + ((t)->v_front_porch))



#define DSI_H_TOTAL_DSC(t) \

	({\

		u64 value;\

		if ((t)->dsc_enabled && (t)->dsc)\

			value = (t)->dsc->pclk_per_line;\

		else\

			value = (t)->h_active;\

		value = value + (t)->h_back_porch + (t)->h_sync_width +\

			(t)->h_front_porch;\

		value;\

	})



#define DSI_H_ACTIVE_DSC(t) \

	({\

		u64 value;\

		if ((t)->dsc_enabled && (t)->dsc)\

			value = (t)->dsc->pclk_per_line;\

		else\

			value = (t)->h_active;\

		value;\

	})





#define DSI_DEBUG_NAME_LEN		32

#define display_for_each_ctrl(index, display) \

	for (index = 0; (index < (display)->ctrl_count) &&\
@@ -726,4 +703,25 @@ static inline int dsi_pixel_format_to_bpp(enum dsi_pixel_format fmt) 
	}

	return 24;

}



static inline u64 dsi_h_active_dce(struct dsi_mode_info *mode)

{

	u64 h_active = 0;



	if (mode->dsc_enabled && mode->dsc)

		h_active = mode->dsc->pclk_per_line;

	else if (mode->vdc_enabled && mode->vdc)

		h_active = mode->vdc->pclk_per_line;

	else

		h_active = mode->h_active;



	return h_active;

}



static inline u64 dsi_h_total_dce(struct dsi_mode_info *mode)

{

	return dsi_h_active_dce(mode) + mode->h_back_porch +

		mode->h_sync_width + mode->h_front_porch;

}



#endif /* _DSI_DEFS_H_ */

msm/dsi/dsi_display.c

+3 −3
Original line number Diff line number Diff line
@@ -3964,7 +3964,7 @@ static void _dsi_display_calc_pipe_delay(struct dsi_display *display, 
	hr_bit_to_esc_ratio = ((dsi_ctrl->clk_freq.byte_clk_rate * 4 * 1000) /

					esc_clk_rate_hz);



	hsync_period = DSI_H_TOTAL_DSC(&mode->timing);

	hsync_period = dsi_h_total_dce(&mode->timing);

	delay->pipe_delay = (hsync_period + 1) / pclk_to_esc_ratio;

	if (!display->panel->video_config.eof_bllp_lp11_en)

		delay->pipe_delay += (17 / pclk_to_esc_ratio) +
@@ -4367,7 +4367,7 @@ static int dsi_display_get_dfps_timing(struct dsi_display *display, 
		rc = dsi_display_dfps_calc_front_porch(

				curr_refresh_rate,

				timing->refresh_rate,

				DSI_H_TOTAL_DSC(timing),

				dsi_h_total_dce(timing),

				DSI_V_TOTAL(timing),

				timing->v_front_porch,

				&adj_mode->timing.v_front_porch);
@@ -4378,7 +4378,7 @@ static int dsi_display_get_dfps_timing(struct dsi_display *display, 
				curr_refresh_rate,

				timing->refresh_rate,

				DSI_V_TOTAL(timing),

				DSI_H_TOTAL_DSC(timing),

				dsi_h_total_dce(timing),

				timing->h_front_porch,

				&adj_mode->timing.h_front_porch);

		if (!rc)

msm/dsi/dsi_panel.c

+2 −2
Original line number Diff line number Diff line
@@ -2195,7 +2195,7 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode, 
		 *  function dsi_panel_calc_dsi_transfer_time( )

		 *  as we set it based on dsi clock or mdp transfer time.

		 */

		pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) *

		pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *

				DSI_V_TOTAL(&mode->timing) *

				mode->timing.refresh_rate);

		do_div(pixel_clk_khz, 1000);
@@ -3504,7 +3504,7 @@ void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config, 
		min_bitclk_hz = (bits_per_line * timing->v_active *

					timing->refresh_rate);

	} else {

		total_active_pixels = ((DSI_H_ACTIVE_DSC(timing)

		total_active_pixels = ((dsi_h_active_dce(timing)

					* timing->v_active));

		/* calculate the actual bitclk needed to transfer the frame */

		min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *

msm/dsi/dsi_phy_timing_calc.c

+1 −1
Original line number Diff line number Diff line
@@ -661,7 +661,7 @@ int dsi_phy_hw_calculate_timing_params(struct dsi_phy_hw *phy, 
	struct phy_timing_ops *ops = phy->ops.timing_ops;



	memset(&desc, 0x0, sizeof(desc));

	h_total = DSI_H_TOTAL_DSC(mode);

	h_total = dsi_h_total_dce(mode);

	v_total = DSI_V_TOTAL(mode);



	bpp = bits_per_pixel[host->dst_format];