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Commit c4f5050e authored by Abhinav Kumar's avatar Abhinav Kumar Committed by Gerrit - the friendly Code Review server
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disp: msm: add VDC topology related changes



Add support to configure the DPU pipeline to support VDC-m
topologies.

Change-Id: Ib8ce9a0eaeaa838759fb09cb2ee164d4765e4989
Signed-off-by: default avatarAbhinav Kumar <abhinavk@codeaurora.org>
parent d88b5b5c
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+7 −1
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
 */


@@ -503,6 +503,12 @@ int dsi_conn_get_mode_info(struct drm_connector *connector,
			sizeof(dsi_mode.priv_info->dsc));
		mode_info->comp_info.comp_ratio =
			MSM_DISPLAY_COMPRESSION_RATIO_3_TO_1;
	} else if (dsi_mode.priv_info->vdc_enabled) {
		mode_info->comp_info.comp_type = MSM_DISPLAY_COMPRESSION_VDC;
		memcpy(&mode_info->comp_info.vdc_info, &dsi_mode.priv_info->vdc,
			sizeof(dsi_mode.priv_info->vdc));
		mode_info->comp_info.comp_ratio =
			MSM_DISPLAY_COMPRESSION_RATIO_4_TO_1;
	}

	if (dsi_mode.priv_info->roi_caps.enabled) {
+5 −0
Original line number Diff line number Diff line
@@ -233,11 +233,13 @@ enum msm_display_compression_type {
 * @MSM_DISPLAY_COMPRESSION_NONE: no compression
 * @MSM_DISPLAY_COMPRESSION_RATIO_2_TO_1: 2 to 1 compression
 * @MSM_DISPLAY_COMPRESSION_RATIO_3_TO_1: 3 to 1 compression
 * @MSM_DISPLAY_COMPRESSION_RATIO_4_TO_1: 4 to 1 compression
 */
enum msm_display_compression_ratio {
	MSM_DISPLAY_COMPRESSION_RATIO_NONE,
	MSM_DISPLAY_COMPRESSION_RATIO_2_TO_1,
	MSM_DISPLAY_COMPRESSION_RATIO_3_TO_1,
	MSM_DISPLAY_COMPRESSION_RATIO_4_TO_1,
	MSM_DISPLAY_COMPRESSION_RATIO_MAX,
};

@@ -599,6 +601,8 @@ struct msm_display_vdc_info {
 * @comp_ratio:       compression ratio
 * @dsc_info:         dsc configuration if the compression
 *                    supported is DSC
 * @vdc_info:         vdc configuration if the compression
 *                    supported is VDC
 */
struct msm_compression_info {
	enum msm_display_compression_type comp_type;
@@ -606,6 +610,7 @@ struct msm_compression_info {

	union{
		struct msm_display_dsc_info dsc_info;
		struct msm_display_vdc_info vdc_info;
	};
};

+3 −1
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// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
 */

#define pr_fmt(fmt)	"[drm:%s:%d] " fmt, __func__, __LINE__
@@ -37,10 +37,12 @@ static const struct drm_prop_enum_list e_topology_name[] = {
	{SDE_RM_TOPOLOGY_NONE,	"sde_none"},
	{SDE_RM_TOPOLOGY_SINGLEPIPE,	"sde_singlepipe"},
	{SDE_RM_TOPOLOGY_SINGLEPIPE_DSC,	"sde_singlepipe_dsc"},
	{SDE_RM_TOPOLOGY_SINGLEPIPE_VDC,	"sde_singlepipe_vdc"},
	{SDE_RM_TOPOLOGY_DUALPIPE,	"sde_dualpipe"},
	{SDE_RM_TOPOLOGY_DUALPIPE_DSC,	"sde_dualpipe_dsc"},
	{SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE,	"sde_dualpipemerge"},
	{SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC,	"sde_dualpipemerge_dsc"},
	{SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_VDC,	"sde_dualpipemerge_vdc"},
	{SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE,	"sde_dualpipe_dscmerge"},
	{SDE_RM_TOPOLOGY_PPSPLIT,	"sde_ppsplit"},
};
+10 −0
Original line number Diff line number Diff line
@@ -74,6 +74,7 @@
#define TOPOLOGY_DUALPIPE_MERGE_MODE(x) \
		(((x) == SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE) || \
		((x) == SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE) || \
		((x) == SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_VDC) || \
		((x) == SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC))

/**
@@ -2040,6 +2041,7 @@ static void sde_encoder_virt_mode_set(struct drm_encoder *drm_enc,
	struct list_head *connector_list;
	struct drm_connector *conn = NULL, *conn_iter;
	struct sde_rm_hw_iter dsc_iter, pp_iter, qdss_iter;
	struct sde_rm_hw_iter vdc_iter;
	struct sde_rm_hw_request request_hw;
	enum sde_intf_mode intf_mode;
	bool is_cmd_mode = false;
@@ -2160,6 +2162,14 @@ static void sde_encoder_virt_mode_set(struct drm_encoder *drm_enc,
		sde_enc->hw_dsc[i] = (struct sde_hw_dsc *) dsc_iter.hw;
	}

	sde_rm_init_hw_iter(&vdc_iter, drm_enc->base.id, SDE_HW_BLK_VDC);
	for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) {
		sde_enc->hw_vdc[i] = NULL;
		if (!sde_rm_get_hw(&sde_kms->rm, &vdc_iter))
			break;
		sde_enc->hw_vdc[i] = (struct sde_hw_vdc *) vdc_iter.hw;
	}

	/* Get PP for DSC configuration */
	for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) {
		struct sde_hw_pingpong *pp = NULL;
+3 −1
Original line number Diff line number Diff line
@@ -135,6 +135,7 @@ struct sde_encoder_ops {
 * @hw_pp		Handle to the pingpong blocks used for the display. No.
 *			pingpong blocks can be different than num_phys_encs.
 * @hw_dsc:		Array of DSC block handles used for the display.
 * @hw_vdc:		Array of VDC block handles used for the display.
 * @dirty_dsc_ids:	Cached dsc indexes for dirty DSC blocks needing flush
 * @intfs_swapped	Whether or not the phys_enc interfaces have been swapped
 *			for partial update right-only cases, such as pingpong
@@ -205,9 +206,10 @@ struct sde_encoder_virt {
	struct sde_encoder_phys *cur_master;
	struct sde_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];
	struct sde_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC];
	struct sde_hw_vdc *hw_vdc[MAX_CHANNELS_PER_ENC];
	struct sde_hw_pingpong *hw_dsc_pp[MAX_CHANNELS_PER_ENC];
	enum sde_dsc dirty_dsc_ids[MAX_CHANNELS_PER_ENC];

	enum sde_vdc dirty_vdc_ids[MAX_CHANNELS_PER_ENC];
	bool intfs_swapped;
	bool qdss_status;

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