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Commit 6161a373 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman
Browse files

powerpc/mm: Fix build error with FLATMEM book3s64 config 



The current value of MAX_PHYSMEM_BITS cannot work with 32 bit configs.
We used to have MAX_PHYSMEM_BITS not defined without SPARSEMEM and 32
bit configs never expected a value to be set for MAX_PHYSMEM_BITS.

Dependent code such as zsmalloc derived the right values based on other
fields. Instead of finding a value that works with different configs,
use new values only for book3s_64. For 64 bit booke, use the definition
of MAX_PHYSMEM_BITS as per commit a7df61a0 ("[PATCH] ppc64: Increase sparsemem defaults")
That change was done in 2005 and hopefully will work with book3e 64.

Fixes: 8bc08689 ("powerpc/mm: Only define MAX_PHYSMEM_BITS in SPARSEMEM configurations")
Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent a68c31fc

arch/powerpc/include/asm/book3s/64/mmu.h

+15 −0
Original line number Diff line number Diff line
@@ -35,6 +35,21 @@ typedef pte_t *pgtable_t; 


#endif /* __ASSEMBLY__ */



/*

 * If we store section details in page->flags we can't increase the MAX_PHYSMEM_BITS

 * if we increase SECTIONS_WIDTH we will not store node details in page->flags and

 * page_to_nid does a page->section->node lookup

 * Hence only increase for VMEMMAP. Further depending on SPARSEMEM_EXTREME reduce

 * memory requirements with large number of sections.

 * 51 bits is the max physical real address on POWER9

 */

#if defined(CONFIG_SPARSEMEM_VMEMMAP) && defined(CONFIG_SPARSEMEM_EXTREME) &&  \

	defined(CONFIG_PPC_64K_PAGES)

#define MAX_PHYSMEM_BITS 51

#else

#define MAX_PHYSMEM_BITS 46

#endif



/* 64-bit classic hash table MMU */

#include <asm/book3s/64/mmu-hash.h>

arch/powerpc/include/asm/mmu.h

+0 −15
Original line number Diff line number Diff line
@@ -349,21 +349,6 @@ static inline bool strict_kernel_rwx_enabled(void) 
 */

#define MMU_PAGE_COUNT	16



/*

 * If we store section details in page->flags we can't increase the MAX_PHYSMEM_BITS

 * if we increase SECTIONS_WIDTH we will not store node details in page->flags and

 * page_to_nid does a page->section->node lookup

 * Hence only increase for VMEMMAP. Further depending on SPARSEMEM_EXTREME reduce

 * memory requirements with large number of sections.

 * 51 bits is the max physical real address on POWER9

 */

#if defined(CONFIG_SPARSEMEM_VMEMMAP) && defined(CONFIG_SPARSEMEM_EXTREME) &&	\

	defined (CONFIG_PPC_64K_PAGES)

#define MAX_PHYSMEM_BITS        51

#elif defined(CONFIG_PPC64)

#define MAX_PHYSMEM_BITS        46

#endif



#ifdef CONFIG_PPC_BOOK3S_64

#include <asm/book3s/64/mmu.h>

#else /* CONFIG_PPC_BOOK3S_64 */

arch/powerpc/include/asm/nohash/64/mmu.h

+2 −0
Original line number Diff line number Diff line
@@ -2,6 +2,8 @@ 
#ifndef _ASM_POWERPC_NOHASH_64_MMU_H_

#define _ASM_POWERPC_NOHASH_64_MMU_H_



#define MAX_PHYSMEM_BITS        44



/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */

#include <asm/nohash/mmu-book3e.h>