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Commit 5a8897cc authored by Will Deacon's avatar Will Deacon Committed by Ingo Molnar
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locking/atomics/alpha: Add smp_read_barrier_depends() to _release()/_relaxed() atomics 



As part of the fight against smp_read_barrier_depends(), we require
dependency ordering to be preserved when a dependency is headed by a load
performed using an atomic operation.

This patch adds smp_read_barrier_depends() to the _release() and _relaxed()
atomics on alpha, which otherwise lack anything to enforce dependency
ordering.

Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarPaul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1508840570-22169-6-git-send-email-will.deacon@arm.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 59ecbbe7

arch/alpha/include/asm/atomic.h

+13 −0
Original line number Diff line number Diff line
@@ -13,6 +13,15 @@ 
 * than regular operations.

 */



/*

 * To ensure dependency ordering is preserved for the _relaxed and

 * _release atomics, an smp_read_barrier_depends() is unconditionally

 * inserted into the _relaxed variants, which are used to build the

 * barriered versions. To avoid redundant back-to-back fences, we can

 * define the _acquire and _fence versions explicitly.

 */

#define __atomic_op_acquire(op, args...)	op##_relaxed(args)

#define __atomic_op_fence			__atomic_op_release



#define ATOMIC_INIT(i)		{ (i) }

#define ATOMIC64_INIT(i)	{ (i) }
@@ -60,6 +69,7 @@ static inline int atomic_##op##_return_relaxed(int i, atomic_t *v) \ 
	".previous"							\

	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\

	:"Ir" (i), "m" (v->counter) : "memory");			\

	smp_read_barrier_depends();					\

	return result;							\

}
@@ -77,6 +87,7 @@ static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v) \ 
	".previous"							\

	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\

	:"Ir" (i), "m" (v->counter) : "memory");			\

	smp_read_barrier_depends();					\

	return result;							\

}
@@ -111,6 +122,7 @@ static __inline__ long atomic64_##op##_return_relaxed(long i, atomic64_t * v) \ 
	".previous"							\

	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\

	:"Ir" (i), "m" (v->counter) : "memory");			\

	smp_read_barrier_depends();					\

	return result;							\

}
@@ -128,6 +140,7 @@ static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v) \ 
	".previous"							\

	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\

	:"Ir" (i), "m" (v->counter) : "memory");			\

	smp_read_barrier_depends();					\

	return result;							\

}