mmc: sdhci-msm: Update to enhanced SDCC5 DLL power up sequence

Update the DLL power up sequence according to the latest enhanced SDCC
DLL HSR document and SDCDC initialization sequence in HPG.

Final sequence:
Step 1 - Set PWRSAVE bit in MCI_CLK to '0' during reset
Step 2 - Disable CK_OUT
Setp 3 - Set CORE_DLL_CLOCK_DISABLE to '1'
Step 4 - Set RST & PDN to '1'
Step 5 - Set DLL_CONFIG_3
Step 6 - Set SDC4_USER_CTRL
Step 7 - Set SDC4_TEST_CTRL(SW can Skip this step)
Step 8 - Set DDR_CONFIG
Step 9 - Set DLL_CONFIG_2
Step 10 - Set DLL_CONFIG
Step 11 - Wait for 52 us
Step 12 - Set RST & PDN to '0'
Step 13 - Set RST to '1'
Step 14 - Set RST to '0'
Step 15 - Set CORE_DLL_CLOCK_DISABLE to '0'
Step 16 - Wait for 8000 input clock cycles
Step 17 - Enable CK_OUT
Step 18 - Check for Lock
Step 19 - If PWRSAVE is needed, set PWRSAVE to '1'.

Change-Id: I889937a1728b3ce039a802972f9668969fe96505
Signed-off-by: Jun Li <liju@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>