disp: msm: sde: always set CTL_x_UIDLE_ACTIVE register to "1"

As per HW recommendation, FAL10_VETO_OVERRIDE register can
be programmed to disable FAL10 in alternate to disabling
uidle at the sspp level as disabling UIDLE controller will
only disable DPU traffic shaping and will not stop the
system from entering FAL10 state. This change programs
FAL10_VETO_OVERRIDE register during uidle disable and also
sets CTL_x_UIDLE_ACTIVE register to always one to avoid
race condition between different CTL paths.

Change-Id: I0361543e345bf6c237ad60560e2b11604f5abf92
Signed-off-by: Yashwanth <quic_yvulapu@quicinc.com>