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Commit 4f9f4964 authored by Will Deacon's avatar Will Deacon Committed by Catalin Marinas
Browse files

arm64: cpufeature: Fix mismerge of CONFIG_ARM64_SSBD block 



When merging support for SSBD and the CRC32 instructions, the conflict
resolution for the new capability entries in arm64_features[]
inadvertedly predicated the availability of the CRC32 instructions on
CONFIG_ARM64_SSBD, despite the functionality being entirely unrelated.

Move the #ifdef CONFIG_ARM64_SSBD down so that it only covers the SSBD
capability.

Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent b5d9a07e

arch/arm64/kernel/cpufeature.c

+1 −1
Original line number Diff line number Diff line
@@ -1333,7 +1333,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = { 
		.cpu_enable = cpu_enable_hw_dbm,

	},

#endif

#ifdef CONFIG_ARM64_SSBD

	{

		.desc = "CRC32 instructions",

		.capability = ARM64_HAS_CRC32,
@@ -1343,6 +1342,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = { 
		.field_pos = ID_AA64ISAR0_CRC32_SHIFT,

		.min_field_value = 1,

	},

#ifdef CONFIG_ARM64_SSBD

	{

		.desc = "Speculative Store Bypassing Safe (SSBS)",

		.capability = ARM64_SSBS,