Commit b5d9a07e authored Nov 16, 2018 by Sergey Matyukevich Committed by Catalin Marinas Nov 23, 2018

arm64: sysreg: fix sparse warnings



Specify correct type for the constants to avoid
the following sparse complaints:

./arch/arm64/include/asm/sysreg.h:471:42: warning: constant 0xffffffffffffffff is so big it is unsigned long
./arch/arm64/include/asm/sysreg.h:512:42: warning: constant 0xffffffffffffffff is so big it is unsigned long

Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

parent 9ff01193

arch/arm64/include/asm/sysreg.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -468,7 +468,7 @@
		SCTLR_ELx_SA \| SCTLR_ELx_I \| SCTLR_ELx_WXN \| \
		SCTLR_ELx_DSSBS \| ENDIAN_CLEAR_EL2 \| SCTLR_EL2_RES0)

		#if (SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != 0xffffffffffffffff
		#if (SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != 0xffffffffffffffffUL
		#error "Inconsistent SCTLR_EL2 set/clear bits"
		#endif

		@@ -509,7 +509,7 @@
		SCTLR_EL1_UMA \| SCTLR_ELx_WXN \| ENDIAN_CLEAR_EL1 \|\
		SCTLR_ELx_DSSBS \| SCTLR_EL1_NTWI \| SCTLR_EL1_RES0)

		#if (SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != 0xffffffffffffffff
		#if (SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != 0xffffffffffffffffUL
		#error "Inconsistent SCTLR_EL1 set/clear bits"
		#endif