dt-bindings: clock: add MDSS clock names for Lahaina

This change adds names for the clocks and dividers used
by DP and DSI PLL on 5nm architecture.

Change-Id: Ia6a49b765cbfbc517e4f2bc06c357c5f3109f912
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>