ARM: dts: qcom: Add support to disable PCIe halt Wr and Rd

This will add the provision to control the PCIe halt Wr and Rd.
By setting this DT flag, PCIe halt Wr and Rd can be disabled.

In Olympic CPE targets observed degradation in throughput due to 
PCIe latencies with PCIe halt write/read feature. 
Hence, disabling the PCIe halt feature in Olympic CPE targets.

Change-Id: Iee945984e24f2a99d9e0b1e2a0323255decc28ef