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Commit 48acf9e2 authored by Liam Mark's avatar Liam Mark
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Revert "iommu/arm-smmu: Add support to disable page-table coherency" 



This reverts commit f85843d3 ("iommu/arm-smmu: Add support to disable
page-table coherency")

This change was added in order to allow iommu clients to disable page
table coherency.
However when page table coherency is disabled using this property on an
SMMU which is configured to be IO-coherent the attempts by the page table
code to apply CMOs on page table entries will be ignored because the
device it is using to apply the CMOs, the SMMU device, is IO-coherent.
This can result in the SMMU seeing stale page table entries.

Since this feature doesn't work and no clients are using revert it.

Change-Id: If6881d24722dd7f1a7398caf6cd904cc7f792bde
Signed-off-by: default avatarLiam Mark <lmark@codeaurora.org>
parent 7b54b39b

drivers/iommu/arm-smmu.c

+0 −30
Original line number Diff line number Diff line
@@ -212,9 +212,6 @@ static bool is_iommu_pt_coherent(struct arm_smmu_domain *smmu_domain) 
	if (test_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT,

		     smmu_domain->attributes))

		return true;

	else if (test_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT,

			  smmu_domain->attributes))

		return false;

	else if (smmu_domain->smmu && smmu_domain->smmu->dev)

		return dev_is_dma_coherent(smmu_domain->smmu->dev);

	else
@@ -2925,9 +2922,6 @@ static int arm_smmu_setup_default_domain(struct device *dev, 
	if (!strcmp(str, "coherent"))

		__arm_smmu_domain_set_attr(domain,

			DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT, &attr);

	else if (!strcmp(str, "non-coherent"))

		__arm_smmu_domain_set_attr(domain,

			DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT, &attr);

	else if (!strcmp(str, "LLC"))

		__arm_smmu_domain_set_attr(domain,

			DOMAIN_ATTR_USE_UPSTREAM_HINT, &attr);
@@ -3780,12 +3774,6 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, 
					  smmu_domain->attributes);

		ret = 0;

		break;

	case DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT:

		*((int *)data) =

			test_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT,

				 smmu_domain->attributes);

		ret = 0;

		break;

	case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE:

	case DOMAIN_ATTR_FAULT_MODEL_NO_STALL:

	case DOMAIN_ATTR_FAULT_MODEL_HUPCF:
@@ -4034,24 +4022,6 @@ static int __arm_smmu_domain_set_attr2(struct iommu_domain *domain, 
		}

		break;

	}

	case DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT: {

		int force_non_coherent = *((int *)data);



		if (smmu_domain->smmu != NULL) {

			dev_err(smmu_domain->smmu->dev,

				"cannot change force non-coherent attribute while attached\n");

			ret = -EBUSY;

		} else if (force_non_coherent) {

			set_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT,

				smmu_domain->attributes);

			ret = 0;

		} else {

			clear_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT,

				  smmu_domain->attributes);

			ret = 0;

		}

		break;

	}

	case DOMAIN_ATTR_SPLIT_TABLES: {

		int split_tables = *((int *)data);

		/* can't be changed while attached */

include/linux/iommu.h

+6 −7
Original line number Diff line number Diff line
@@ -191,13 +191,12 @@ enum iommu_attr { 
#define DOMAIN_ATTR_EARLY_MAP			(EXTENDED_ATTR_BASE + 13)

#define DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT	(EXTENDED_ATTR_BASE + 14)

#define DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT	(EXTENDED_ATTR_BASE + 15)

#define DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT (EXTENDED_ATTR_BASE + 16)

#define DOMAIN_ATTR_USE_LLC_NWA			(EXTENDED_ATTR_BASE + 17)

#define DOMAIN_ATTR_SPLIT_TABLES		(EXTENDED_ATTR_BASE + 18)

#define DOMAIN_ATTR_FAULT_MODEL_NO_CFRE		(EXTENDED_ATTR_BASE + 19)

#define DOMAIN_ATTR_FAULT_MODEL_NO_STALL	(EXTENDED_ATTR_BASE + 20)

#define DOMAIN_ATTR_FAULT_MODEL_HUPCF		(EXTENDED_ATTR_BASE + 21)

#define DOMAIN_ATTR_EXTENDED_MAX		(EXTENDED_ATTR_BASE + 22)

#define DOMAIN_ATTR_USE_LLC_NWA			(EXTENDED_ATTR_BASE + 16)

#define DOMAIN_ATTR_SPLIT_TABLES		(EXTENDED_ATTR_BASE + 17)

#define DOMAIN_ATTR_FAULT_MODEL_NO_CFRE		(EXTENDED_ATTR_BASE + 18)

#define DOMAIN_ATTR_FAULT_MODEL_NO_STALL	(EXTENDED_ATTR_BASE + 19)

#define DOMAIN_ATTR_FAULT_MODEL_HUPCF		(EXTENDED_ATTR_BASE + 20)

#define DOMAIN_ATTR_EXTENDED_MAX		(EXTENDED_ATTR_BASE + 21)



/* These are the possible reserved region types */

enum iommu_resv_type {