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Commit 43608372 authored by Eran Ben Elisha's avatar Eran Ben Elisha Committed by Greg Kroah-Hartman
Browse files

net/mlx5: Verify Hardware supports requested ptp function on a given pin 



[ Upstream commit 071995c877a8646209d55ff8edddd2b054e7424c ]

Fix a bug where driver did not verify Hardware pin capabilities for
PTP functions.

Fixes: ee7f1220 ("net/mlx5e: Implement 1PPS support")
Signed-off-by: default avatarEran Ben Elisha <eranbe@mellanox.com>
Reviewed-by: default avatarAriel Levkovich <lariel@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 8901896f

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

+22 −1
Original line number Diff line number Diff line
@@ -388,10 +388,31 @@ static int mlx5_ptp_enable(struct ptp_clock_info *ptp, 
	return 0;

}



enum {

	MLX5_MTPPS_REG_CAP_PIN_X_MODE_SUPPORT_PPS_IN = BIT(0),

	MLX5_MTPPS_REG_CAP_PIN_X_MODE_SUPPORT_PPS_OUT = BIT(1),

};



static int mlx5_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,

			   enum ptp_pin_function func, unsigned int chan)

{

	return (func == PTP_PF_PHYSYNC) ? -EOPNOTSUPP : 0;

	struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock,

						ptp_info);



	switch (func) {

	case PTP_PF_NONE:

		return 0;

	case PTP_PF_EXTTS:

		return !(clock->pps_info.pin_caps[pin] &

			 MLX5_MTPPS_REG_CAP_PIN_X_MODE_SUPPORT_PPS_IN);

	case PTP_PF_PEROUT:

		return !(clock->pps_info.pin_caps[pin] &

			 MLX5_MTPPS_REG_CAP_PIN_X_MODE_SUPPORT_PPS_OUT);

	default:

		return -EOPNOTSUPP;

	}



	return -EOPNOTSUPP;

}



static const struct ptp_clock_info mlx5_ptp_clock_info = {