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Commit 42c8ae11 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'cxgb4-collect-more-hardware-dumps-via-ethtool' 



Rahul Lakkireddy says:

====================
cxgb4: collect more hardware dumps via ethtool

This series of patches collect more firmware and hardware dumps
via ethool --get-dump facility.

Patch 1 collects hardware logic analyzer dumps.

Patch 2 collects CIM queue configuration dump.

Patch 3 collects RSS dumps.

Patch 4 collects TID info dump.

Patch 5 collects MPS-TCAM dump.

Patch 6 collects PBT tables dump.

Patch 7 collects hardware scheduler and pace table dumps.

Patch 8 collects miscellaneous hardware information, including
path mtu, PM stats, TP clock info, congestion control, and VPD
data dumps.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 123196b6 6f92a654

drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h

+159 −0
Original line number Diff line number Diff line
@@ -21,6 +21,8 @@ 
#define EDC0_FLAG 3

#define EDC1_FLAG 4



#define CUDBG_ENTITY_SIGNATURE 0xCCEDB001



struct card_mem {

	u16 size_edc0;

	u16 size_edc1;
@@ -33,6 +35,35 @@ struct cudbg_mbox_log { 
	u32 lo[MBOX_LEN / 8];

};



struct cudbg_cim_qcfg {

	u8 chip;

	u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];

	u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];

	u16 thres[CIM_NUM_IBQ];

	u32 obq_wr[2 * CIM_NUM_OBQ_T5];

	u32 stat[4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5)];

};



struct cudbg_rss_vf_conf {

	u32 rss_vf_vfl;

	u32 rss_vf_vfh;

};



struct cudbg_pm_stats {

	u32 tx_cnt[T6_PM_NSTATS];

	u32 rx_cnt[T6_PM_NSTATS];

	u64 tx_cyc[T6_PM_NSTATS];

	u64 rx_cyc[T6_PM_NSTATS];

};



struct cudbg_hw_sched {

	u32 kbps[NTX_SCHED];

	u32 ipg[NTX_SCHED];

	u32 pace_tab[NTX_SCHED];

	u32 mode;

	u32 map;

};



struct ireg_field {

	u32 ireg_addr;

	u32 ireg_data;
@@ -45,6 +76,134 @@ struct ireg_buf { 
	u32 outbuf[32];

};



struct cudbg_ulprx_la {

	u32 data[ULPRX_LA_SIZE * 8];

	u32 size;

};



struct cudbg_tp_la {

	u32 size;

	u32 mode;

	u8 data[0];

};



struct cudbg_cim_pif_la {

	int size;

	u8 data[0];

};



struct cudbg_clk_info {

	u64 retransmit_min;

	u64 retransmit_max;

	u64 persist_timer_min;

	u64 persist_timer_max;

	u64 keepalive_idle_timer;

	u64 keepalive_interval;

	u64 initial_srtt;

	u64 finwait2_timer;

	u32 dack_timer;

	u32 res;

	u32 cclk_ps;

	u32 tre;

	u32 dack_re;

};



struct cudbg_tid_info_region {

	u32 ntids;

	u32 nstids;

	u32 stid_base;

	u32 hash_base;



	u32 natids;

	u32 nftids;

	u32 ftid_base;

	u32 aftid_base;

	u32 aftid_end;



	u32 sftid_base;

	u32 nsftids;



	u32 uotid_base;

	u32 nuotids;



	u32 sb;

	u32 flags;

	u32 le_db_conf;

	u32 ip_users;

	u32 ipv6_users;



	u32 hpftid_base;

	u32 nhpftids;

};



#define CUDBG_TID_INFO_REV 1



struct cudbg_tid_info_region_rev1 {

	struct cudbg_ver_hdr ver_hdr;

	struct cudbg_tid_info_region tid;

	u32 tid_start;

	u32 reserved[16];

};



#define CUDBG_MAX_RPLC_SIZE 128



struct cudbg_mps_tcam {

	u64 mask;

	u32 rplc[8];

	u32 idx;

	u32 cls_lo;

	u32 cls_hi;

	u32 rplc_size;

	u32 vniy;

	u32 vnix;

	u32 dip_hit;

	u32 vlan_vld;

	u32 repli;

	u16 ivlan;

	u8 addr[ETH_ALEN];

	u8 lookup_type;

	u8 port_num;

	u8 reserved[2];

};



struct cudbg_vpd_data {

	u8 sn[SERNUM_LEN + 1];

	u8 bn[PN_LEN + 1];

	u8 na[MACADDR_LEN + 1];

	u8 mn[ID_LEN + 1];

	u16 fw_major;

	u16 fw_minor;

	u16 fw_micro;

	u16 fw_build;

	u32 scfg_vers;

	u32 vpd_vers;

};



#define CUDBG_NUM_ULPTX 11

#define CUDBG_NUM_ULPTX_READ 512



struct cudbg_ulptx_la {

	u32 rdptr[CUDBG_NUM_ULPTX];

	u32 wrptr[CUDBG_NUM_ULPTX];

	u32 rddata[CUDBG_NUM_ULPTX];

	u32 rd_data[CUDBG_NUM_ULPTX][CUDBG_NUM_ULPTX_READ];

};



#define CUDBG_CHAC_PBT_ADDR 0x2800

#define CUDBG_CHAC_PBT_LRF  0x3000

#define CUDBG_CHAC_PBT_DATA 0x3800

#define CUDBG_PBT_DYNAMIC_ENTRIES 8

#define CUDBG_PBT_STATIC_ENTRIES 16

#define CUDBG_LRF_ENTRIES 8

#define CUDBG_PBT_DATA_ENTRIES 512



struct cudbg_pbt_tables {

	u32 pbt_dynamic[CUDBG_PBT_DYNAMIC_ENTRIES];

	u32 pbt_static[CUDBG_PBT_STATIC_ENTRIES];

	u32 lrf_table[CUDBG_LRF_ENTRIES];

	u32 pbt_data[CUDBG_PBT_DATA_ENTRIES];

};



#define IREG_NUM_ELEM 4



static const u32 t6_tp_pio_array[][IREG_NUM_ELEM] = {

drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h

+19 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#define CUDBG_STATUS_NO_MEM -19

#define CUDBG_STATUS_ENTITY_NOT_FOUND -24

#define CUDBG_SYSTEM_ERROR -29

#define CUDBG_STATUS_CCLK_NOT_DEFINED -32



#define CUDBG_MAJOR_VERSION 1

#define CUDBG_MINOR_VERSION 14
@@ -29,6 +30,9 @@ 
enum cudbg_dbg_entity_type {

	CUDBG_REG_DUMP = 1,

	CUDBG_DEV_LOG = 2,

	CUDBG_CIM_LA = 3,

	CUDBG_CIM_MA_LA = 4,

	CUDBG_CIM_QCFG = 5,

	CUDBG_CIM_IBQ_TP0 = 6,

	CUDBG_CIM_IBQ_TP1 = 7,

	CUDBG_CIM_IBQ_ULP = 8,
@@ -43,14 +47,29 @@ enum cudbg_dbg_entity_type { 
	CUDBG_CIM_OBQ_NCSI = 17,

	CUDBG_EDC0 = 18,

	CUDBG_EDC1 = 19,

	CUDBG_RSS = 22,

	CUDBG_RSS_VF_CONF = 25,

	CUDBG_PATH_MTU = 27,

	CUDBG_PM_STATS = 30,

	CUDBG_HW_SCHED = 31,

	CUDBG_TP_INDIRECT = 36,

	CUDBG_SGE_INDIRECT = 37,

	CUDBG_ULPRX_LA = 41,

	CUDBG_TP_LA = 43,

	CUDBG_CIM_PIF_LA = 45,

	CUDBG_CLK = 46,

	CUDBG_CIM_OBQ_RXQ0 = 47,

	CUDBG_CIM_OBQ_RXQ1 = 48,

	CUDBG_PCIE_INDIRECT = 50,

	CUDBG_PM_INDIRECT = 51,

	CUDBG_TID_INFO = 54,

	CUDBG_MPS_TCAM = 57,

	CUDBG_VPD_DATA = 58,

	CUDBG_CCTRL = 60,

	CUDBG_MA_INDIRECT = 61,

	CUDBG_ULPTX_LA = 62,

	CUDBG_UP_CIM_INDIRECT = 64,

	CUDBG_PBT_TABLE = 65,

	CUDBG_MBOX_LOG = 66,

	CUDBG_HMA_INDIRECT = 67,

	CUDBG_MAX_ENTITY = 70,

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c

+746 −0

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h

+54 −0
Original line number Diff line number Diff line
@@ -24,6 +24,15 @@ int cudbg_collect_reg_dump(struct cudbg_init *pdbg_init, 
int cudbg_collect_fw_devlog(struct cudbg_init *pdbg_init,

			    struct cudbg_buffer *dbg_buff,

			    struct cudbg_error *cudbg_err);

int cudbg_collect_cim_la(struct cudbg_init *pdbg_init,

			 struct cudbg_buffer *dbg_buff,

			 struct cudbg_error *cudbg_err);

int cudbg_collect_cim_ma_la(struct cudbg_init *pdbg_init,

			    struct cudbg_buffer *dbg_buff,

			    struct cudbg_error *cudbg_err);

int cudbg_collect_cim_qcfg(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

int cudbg_collect_cim_ibq_tp0(struct cudbg_init *pdbg_init,

			      struct cudbg_buffer *dbg_buff,

			      struct cudbg_error *cudbg_err);
@@ -66,12 +75,39 @@ int cudbg_collect_edc0_meminfo(struct cudbg_init *pdbg_init, 
int cudbg_collect_edc1_meminfo(struct cudbg_init *pdbg_init,

			       struct cudbg_buffer *dbg_buff,

			       struct cudbg_error *cudbg_err);

int cudbg_collect_rss(struct cudbg_init *pdbg_init,

		      struct cudbg_buffer *dbg_buff,

		      struct cudbg_error *cudbg_err);

int cudbg_collect_rss_vf_config(struct cudbg_init *pdbg_init,

				struct cudbg_buffer *dbg_buff,

				struct cudbg_error *cudbg_err);

int cudbg_collect_tp_indirect(struct cudbg_init *pdbg_init,

			      struct cudbg_buffer *dbg_buff,

			      struct cudbg_error *cudbg_err);

int cudbg_collect_path_mtu(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

int cudbg_collect_pm_stats(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

int cudbg_collect_hw_sched(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

int cudbg_collect_sge_indirect(struct cudbg_init *pdbg_init,

			       struct cudbg_buffer *dbg_buff,

			       struct cudbg_error *cudbg_err);

int cudbg_collect_ulprx_la(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

int cudbg_collect_tp_la(struct cudbg_init *pdbg_init,

			struct cudbg_buffer *dbg_buff,

			struct cudbg_error *cudbg_err);

int cudbg_collect_cim_pif_la(struct cudbg_init *pdbg_init,

			     struct cudbg_buffer *dbg_buff,

			     struct cudbg_error *cudbg_err);

int cudbg_collect_clk_info(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

int cudbg_collect_obq_sge_rx_q0(struct cudbg_init *pdbg_init,

				struct cudbg_buffer *dbg_buff,

				struct cudbg_error *cudbg_err);
@@ -84,12 +120,30 @@ int cudbg_collect_pcie_indirect(struct cudbg_init *pdbg_init, 
int cudbg_collect_pm_indirect(struct cudbg_init *pdbg_init,

			      struct cudbg_buffer *dbg_buff,

			      struct cudbg_error *cudbg_err);

int cudbg_collect_tid(struct cudbg_init *pdbg_init,

		      struct cudbg_buffer *dbg_buff,

		      struct cudbg_error *cudbg_err);

int cudbg_collect_mps_tcam(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

int cudbg_collect_vpd_data(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

int cudbg_collect_cctrl(struct cudbg_init *pdbg_init,

			struct cudbg_buffer *dbg_buff,

			struct cudbg_error *cudbg_err);

int cudbg_collect_ma_indirect(struct cudbg_init *pdbg_init,

			      struct cudbg_buffer *dbg_buff,

			      struct cudbg_error *cudbg_err);

int cudbg_collect_ulptx_la(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

int cudbg_collect_up_cim_indirect(struct cudbg_init *pdbg_init,

				  struct cudbg_buffer *dbg_buff,

				  struct cudbg_error *cudbg_err);

int cudbg_collect_pbt_tables(struct cudbg_init *pdbg_init,

			     struct cudbg_buffer *dbg_buff,

			     struct cudbg_error *cudbg_err);

int cudbg_collect_mbox_log(struct cudbg_init *pdbg_init,

			   struct cudbg_buffer *dbg_buff,

			   struct cudbg_error *cudbg_err);

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib_common.h

+6 −0
Original line number Diff line number Diff line
@@ -57,6 +57,12 @@ struct cudbg_entity_hdr { 
	u32 reserved[5];

};



struct cudbg_ver_hdr {

	u32 signature;

	u16 revision;

	u16 size;

};



struct cudbg_buffer {

	u32 size;

	u32 offset;