Merge "ARM: dts: msm: Remove core clock reset for shima"

		qcom,clock-configs = <0x0 0x0 0x1 0x1>;

		qcom,allowed-clock-rates = <240000000 338000000

			364800000>;

		resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,

			<&videocc VIDEO_CC_MVS0C_CLK_ARES>;

		reset-names = "video_axi_reset", "video_core_reset";

		resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;

		reset-names = "video_axi_reset";

		qcom,reg-presets = <0xB0088 0x0 0x11>;